| Message ID | 20210224115146.9131-2-aford173@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | [V3,1/5] dt-bindings: net: renesas,etheravb: Add additional clocks | expand |
On Wed, Feb 24, 2021 at 05:51:42AM -0600, Adam Ford wrote: > The bindings have been updated to support two clocks, but the > original clock now requires the name fck. Add a clock-names > list in the device tree with fck in it. Hi Adam I think requires is too strong. As far as i can see, you don't introduce a change using the name 'fck'. So the name is optional, which is good, because otherwise you would break backwards compatibility with DT blobs. Is the plan to merge this whole patchset via netdev? If so, you need to repost anyway, once netdev reopens. So maybe you can change the wording? Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
Hi Andrew, On Wed, Feb 24, 2021 at 2:45 PM Andrew Lunn <andrew@lunn.ch> wrote: > On Wed, Feb 24, 2021 at 05:51:42AM -0600, Adam Ford wrote: > > The bindings have been updated to support two clocks, but the > > original clock now requires the name fck. Add a clock-names > > list in the device tree with fck in it. > > I think requires is too strong. As far as i can see, you don't > introduce a change using the name 'fck'. So the name is optional, > which is good, because otherwise you would break backwards > compatibility with DT blobs. > > Is the plan to merge this whole patchset via netdev? If so, you need > to repost anyway, once netdev reopens. So maybe you can change the > wording? The DTS patches should go in through the renesas and soc trees. I can apply them as soon as the DT binding patch has been accepted. Thanks! Gr{oetje,eeting}s, Geert
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi index 6a78c813057b..6b922f664fcd 100644 --- a/arch/arm/boot/dts/r8a7742.dtsi +++ b/arch/arm/boot/dts/r8a7742.dtsi @@ -750,6 +750,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index f444e418f408..084bf3e039cf 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -702,6 +702,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi index 0442aad4f9db..d01eba99ceb0 100644 --- a/arch/arm/boot/dts/r8a7744.dtsi +++ b/arch/arm/boot/dts/r8a7744.dtsi @@ -702,6 +702,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 0f14ac22921d..d0d45a369047 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -645,6 +645,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 691b1a131c87..ae90a001d663 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -537,6 +537,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index b0569b4ea5c8..af9cd3324f4c 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -768,6 +768,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 87f0d6dc3e5a..2354af7fa83f 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -728,6 +728,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index f5b299bfcb23..60c184ab1b49 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -537,6 +537,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index cd5e2904068a..18cc6f6b588d 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -598,6 +598,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>;