| Message ID | 20210305132859.8208-1-wsa+renesas@sang-engineering.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | clocksource: sh_cmt: use CMTOUT_IE only when supported | expand |
Hi Wolfram, Phong-san, On Fri, Mar 5, 2021 at 2:30 PM Wolfram Sang <wsa+renesas@sang-engineering.com> wrote: > CMTOUT_IE is only supported for older SoCs. Newer SoCs shall not set > this bit. So, add a version check. > > Reported-by: Phong Hoang <phong.hoang.wz@renesas.com> > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Thanks for your patch! As R-Car Gen2/3 indeed don't have this bit: Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> But given my comments below, I think it would make sense to change the one-line summary to e.g. "clocksource: sh_cmt: R-Car Gen2/Gen3 do not have CMTOUT_IE". > --- a/drivers/clocksource/sh_cmt.c > +++ b/drivers/clocksource/sh_cmt.c > @@ -143,6 +143,7 @@ struct sh_cmt_device { > #define SH_CMT32_CMCSR_SSIE (1 << 10) > #define SH_CMT32_CMCSR_CMS (1 << 9) > #define SH_CMT32_CMCSR_CMM (1 << 8) > +/* CMTOUT_IE only for SH_CMT_32BIT and SH_CMT_48BIT */ > #define SH_CMT32_CMCSR_CMTOUT_IE (1 << 7) > #define SH_CMT32_CMCSR_CMR_NONE (0 << 4) > #define SH_CMT32_CMCSR_CMR_DMA (1 << 4) > @@ -339,8 +340,9 @@ static int sh_cmt_enable(struct sh_cmt_channel *ch) > sh_cmt_write_cmcsr(ch, SH_CMT16_CMCSR_CMIE | > SH_CMT16_CMCSR_CKS512); > } else { > - sh_cmt_write_cmcsr(ch, SH_CMT32_CMCSR_CMM | > - SH_CMT32_CMCSR_CMTOUT_IE | > + u32 cmtout = ch->cmt->info->model <= SH_CMT_48BIT ? > + SH_CMT32_CMCSR_CMTOUT_IE : 0; > + sh_cmt_write_cmcsr(ch, cmtout | SH_CMT32_CMCSR_CMM | > SH_CMT32_CMCSR_CMR_IRQ | > SH_CMT32_CMCSR_CKS_RCLK8); > } Note that this bit is still set for all "32-bit" and all other "48-bit" variants: SH_CMT_32BIT: sh7720: CMTOUT_IE supported sh7343/7366: no docs sh7722/sh7723: limited docs, but "Supports canceling of the standby state in U-standby mode." sh7724: CMTOUT_IE supported SH_CMT_48BIT: sh73a0/r8a7740: CMTOUT_IE supported on channels 1/2/3, not on 0/4/5 So even not all older models support this bit. Probably this bit should only be set when the timer is configured as a wake-up source. But that is out-of-scope for this patch. Gr{oetje,eeting}s, Geert
Hi Wolfram, Thanks for your patch. On 2021-03-05 14:28:59 +0100, Wolfram Sang wrote: > CMTOUT_IE is only supported for older SoCs. Newer SoCs shall not set > this bit. So, add a version check. > > Reported-by: Phong Hoang <phong.hoang.wz@renesas.com> > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > > Confirmed with datasheets and could successfully repeat Niklas' CMT > tests on an R-Car M3N based Salvator-XS. > > drivers/clocksource/sh_cmt.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c > index c98f8851fd68..3b53c6cb1da9 100644 > --- a/drivers/clocksource/sh_cmt.c > +++ b/drivers/clocksource/sh_cmt.c > @@ -143,6 +143,7 @@ struct sh_cmt_device { > #define SH_CMT32_CMCSR_SSIE (1 << 10) > #define SH_CMT32_CMCSR_CMS (1 << 9) > #define SH_CMT32_CMCSR_CMM (1 << 8) > +/* CMTOUT_IE only for SH_CMT_32BIT and SH_CMT_48BIT */ > #define SH_CMT32_CMCSR_CMTOUT_IE (1 << 7) > #define SH_CMT32_CMCSR_CMR_NONE (0 << 4) > #define SH_CMT32_CMCSR_CMR_DMA (1 << 4) > @@ -339,8 +340,9 @@ static int sh_cmt_enable(struct sh_cmt_channel *ch) > sh_cmt_write_cmcsr(ch, SH_CMT16_CMCSR_CMIE | > SH_CMT16_CMCSR_CKS512); > } else { > - sh_cmt_write_cmcsr(ch, SH_CMT32_CMCSR_CMM | > - SH_CMT32_CMCSR_CMTOUT_IE | > + u32 cmtout = ch->cmt->info->model <= SH_CMT_48BIT ? > + SH_CMT32_CMCSR_CMTOUT_IE : 0; > + sh_cmt_write_cmcsr(ch, cmtout | SH_CMT32_CMCSR_CMM | > SH_CMT32_CMCSR_CMR_IRQ | > SH_CMT32_CMCSR_CKS_RCLK8); > } > -- > 2.29.2 >
> But given my comments below, I think it would make sense to change the > one-line summary to e.g. "clocksource: sh_cmt: R-Car Gen2/Gen3 do not > have CMTOUT_IE". Makes sense. I will resend. > SH_CMT_48BIT: > sh73a0/r8a7740: CMTOUT_IE supported on channels 1/2/3, not on 0/4/5 Oh, I didn't spot this, sorry! > So even not all older models support this bit. > Probably this bit should only be set when the timer is configured as a > wake-up source. But that is out-of-scope for this patch. Ack.
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index c98f8851fd68..3b53c6cb1da9 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -143,6 +143,7 @@ struct sh_cmt_device { #define SH_CMT32_CMCSR_SSIE (1 << 10) #define SH_CMT32_CMCSR_CMS (1 << 9) #define SH_CMT32_CMCSR_CMM (1 << 8) +/* CMTOUT_IE only for SH_CMT_32BIT and SH_CMT_48BIT */ #define SH_CMT32_CMCSR_CMTOUT_IE (1 << 7) #define SH_CMT32_CMCSR_CMR_NONE (0 << 4) #define SH_CMT32_CMCSR_CMR_DMA (1 << 4) @@ -339,8 +340,9 @@ static int sh_cmt_enable(struct sh_cmt_channel *ch) sh_cmt_write_cmcsr(ch, SH_CMT16_CMCSR_CMIE | SH_CMT16_CMCSR_CKS512); } else { - sh_cmt_write_cmcsr(ch, SH_CMT32_CMCSR_CMM | - SH_CMT32_CMCSR_CMTOUT_IE | + u32 cmtout = ch->cmt->info->model <= SH_CMT_48BIT ? + SH_CMT32_CMCSR_CMTOUT_IE : 0; + sh_cmt_write_cmcsr(ch, cmtout | SH_CMT32_CMCSR_CMM | SH_CMT32_CMCSR_CMR_IRQ | SH_CMT32_CMCSR_CKS_RCLK8); }
CMTOUT_IE is only supported for older SoCs. Newer SoCs shall not set this bit. So, add a version check. Reported-by: Phong Hoang <phong.hoang.wz@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> --- Confirmed with datasheets and could successfully repeat Niklas' CMT tests on an R-Car M3N based Salvator-XS. drivers/clocksource/sh_cmt.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)