From patchwork Mon Jun 14 19:32:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 12319671 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33299C2B9F4 for ; Mon, 14 Jun 2021 19:33:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 19EBB61153 for ; Mon, 14 Jun 2021 19:33:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234496AbhFNTfM (ORCPT ); Mon, 14 Jun 2021 15:35:12 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:7491 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S234412AbhFNTfM (ORCPT ); Mon, 14 Jun 2021 15:35:12 -0400 X-IronPort-AV: E=Sophos;i="5.83,273,1616425200"; d="scan'208";a="84338942" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 15 Jun 2021 04:33:08 +0900 Received: from localhost.localdomain (unknown [10.226.92.107]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 4840840031D1; Tue, 15 Jun 2021 04:33:04 +0900 (JST) From: Biju Das To: Philipp Zabel Cc: Biju Das , Chris Brandt , Wolfram Sang , Arnd Bergmann , Jarkko Nikula , Jean Delvare , Khalil Blaiech , Krzysztof Kozlowski , Yicong Yang , =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= , Mike Rapoport , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , linux-i2c@vger.kernel.org, Geert Uytterhoeven , Chris Paterson , Biju Das , Prabhakar Mahadev Lad , linux-renesas-soc@vger.kernel.org Subject: [PATCH v2 2/2] i2c: riic: Add RZ/G2L support Date: Mon, 14 Jun 2021 20:32:53 +0100 Message-Id: <20210614193253.10011-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210614193253.10011-1-biju.das.jz@bp.renesas.com> References: <20210614193253.10011-1-biju.das.jz@bp.renesas.com> Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org RZ/G2L i2c controller is compatible with RZ/A i2c controller. By default IP is in reset state, so need to perform release reset before accessing any register. Signed-off-by: Biju Das Reviewed-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Philipp Zabel --- v1->v2 * Changed to devm_reset_control_get_exclusive API for reset_control_get. * Updated KCONFIG to enable RESET_CONTROLLER only if it is RZ/G2L SoC. * Filled .data for RIIC_RZ_A. --- drivers/i2c/busses/Kconfig | 1 + drivers/i2c/busses/i2c-riic.c | 23 ++++++++++++++++++++++- 2 files changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 281a65d9b44b..17bd15ad8761 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -941,6 +941,7 @@ config I2C_QUP config I2C_RIIC tristate "Renesas RIIC adapter" depends on ARCH_RENESAS || COMPILE_TEST + select RESET_CONTROLLER if ARCH_R9A07G044 help If you say yes to this option, support will be included for the Renesas RIIC I2C interface. diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 4eccc0f69861..78b84445ee6a 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -42,8 +42,10 @@ #include #include #include +#include #include #include +#include #define RIIC_ICCR1 0x00 #define RIIC_ICCR2 0x04 @@ -86,6 +88,11 @@ #define RIIC_INIT_MSG -1 +enum riic_type { + RIIC_RZ_A, + RIIC_RZ_G2L, +}; + struct riic_dev { void __iomem *base; u8 *buf; @@ -395,7 +402,9 @@ static int riic_i2c_probe(struct platform_device *pdev) struct i2c_adapter *adap; struct resource *res; struct i2c_timings i2c_t; + struct reset_control *rstc; int i, ret; + enum riic_type type; riic = devm_kzalloc(&pdev->dev, sizeof(*riic), GFP_KERNEL); if (!riic) @@ -412,6 +421,17 @@ static int riic_i2c_probe(struct platform_device *pdev) return PTR_ERR(riic->clk); } + type = (enum riic_type)of_device_get_match_data(&pdev->dev); + if (type == RIIC_RZ_G2L) { + rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); + if (IS_ERR(rstc)) { + dev_err(&pdev->dev, "Error: missing reset ctrl\n"); + return PTR_ERR(rstc); + } + + reset_control_deassert(rstc); + } + for (i = 0; i < ARRAY_SIZE(riic_irqs); i++) { res = platform_get_resource(pdev, IORESOURCE_IRQ, riic_irqs[i].res_num); if (!res) @@ -472,7 +492,8 @@ static int riic_i2c_remove(struct platform_device *pdev) } static const struct of_device_id riic_i2c_dt_ids[] = { - { .compatible = "renesas,riic-rz" }, + { .compatible = "renesas,riic-r9a07g044", .data = (void *)RIIC_RZ_G2L }, + { .compatible = "renesas,riic-rz", .data = (void *)RIIC_RZ_A }, { /* Sentinel */ }, };