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Mon, 19 Jul 2021 18:20:27 +0000 From: Alex Helms To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: robh+dt@kernel.org, sboyd@kernel.org, mturquette@baylibre.com, geert+renesas@glider.be, alexander.helms.jy@renesas.com, david.cater.jc@renesas.com, michal.simek@xilinx.com Subject: [PATCH v5 1/2] dt-bindings: Add binding for Renesas 8T49N241 Date: Mon, 19 Jul 2021 11:20:00 -0700 Message-Id: <20210719182001.1573-2-alexander.helms.jy@renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719182001.1573-1-alexander.helms.jy@renesas.com> References: <20210719182001.1573-1-alexander.helms.jy@renesas.com> X-ClientProxiedBy: BYAPR21CA0020.namprd21.prod.outlook.com (2603:10b6:a03:114::30) To OSAPR01MB3892.jpnprd01.prod.outlook.com (2603:1096:604:5b::23) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from az-ahelms.na.ads.idt.com (68.225.135.226) by BYAPR21CA0020.namprd21.prod.outlook.com (2603:10b6:a03:114::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4308.17 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: jpanHlJxycEjyqkOo50FWSg8y0FzPcYvKOnkovQUYIIl97/xWwS7BN0qpTdc+yCn/cTqssbl0mzuHBTYUcR1WJvY1CSju3T+vSEhwu5OgmYGtumzTnaNCj4+HIXf6+3Q2TbcVNsPeifMgzcFEkA4wE8T3e7UF7dDqj8KuVGjexhF/eS9he78cbJn/eO5O6xI0A39MwWNhfz6S1haZ9pT2hsVZTntODOwduVQRCJGNgF7xxWUqN0JG3pG6z2KtWW/x2tbhemKIOV2WLzrFIKeWUbsyxsL/bp4CV+VGV772Vl44SithKO4TNzUEipmcCUIsZ9JkgX+K0fn6WsRE2ODEjsfL0gg9WGpFBNrYIaGez8wPfiHk6a1ermABK6jlQyFXI2JZBSfXYA0AxsBqoGBk1aa9Wml/5rXRCrj3MxHPpbQsJynjsG433d0alHOml6T4lKH6arNebvPpNT122cQ7SGiqmsEbFOtB3R7PyOiXvX7QcCq+XLZywqZhREj1albsp8vq5Tw/s44uHT0ZJopCtsBpC51fChKHp9G+t39D96lUeEflRfw4PnrhJwZMVUrOGD4pCgb5WPqKOYw9TmRTSJSaXxMTi4eD9g9aIjRgK/QhwKO0kpHSs7qKaMuXmfZwop9XI25CJu17XUxKZpFEMICBunMaidipSpUnEpCn1DPA9PgEBpH5YY0XA/2XxBVvENPs2bj8b5cCGgP+t4iO8oWOq2y9I7RUc3GvKANDJZjieJKm2ycuMCSAzjVASYspeqQeD3arWSOKhudyMaqrOFoxeI16F0dWfrOXhwbrljCD0ciMsRI9h+HjZJmBwWLG7tSZ0f2zQpUJVcQ0v2/jnYzgnnrSaqSC0fZm7GvFA+ulo7KRkhek4EbBiniB2iOx5uxa2FyQumdHDjrr/com4As+tHkWPH9MaHvo1EVEDqN//aLCBhtKeVEOl+ik+yuFs9Qc4n0/IaWhpGhzs6DILKz82UMzOiGC0IDD9c70mdJ9J0jwBGdDWIOKXpM0/LJS6C0kYX9VlBkK3dqfxHMSl46l0MxPaHlxVuvQOkdhr6DHKa0ntff7Fenx5W1et0dThY3z4qvmCDwnbt6ryyMB0pU9m6qubzgnSwFPIoNhO3uGawrTajVv+6nPzC4PYVROnTyBvbAclNazqphW/9EVbbHtXoIeIF0i/HonsraDv2Af/3JX9tsQhm/aA4rvQlI9HKdyuLhv4qnPKtq9qPH58bOxhU4zUHwugLrdoc8vt6pEb35lkfNIi5hrePoXZK1Ny3q11SuTconj4JRTGo5X9NhKYiIywo2UBXn2dLK9SEDO0NTYkpQGYSIVeFnTKL6 X-OriginatorOrg: renesas.com X-MS-Exchange-CrossTenant-Network-Message-Id: 05896fbd-4437-4198-946d-08d94ae1e248 X-MS-Exchange-CrossTenant-AuthSource: OSAPR01MB3892.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jul 2021 18:20:27.6928 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: nIQruUCyk223hRiAY/ZbF0j+JRw3WJ7Adw7Hw5U5b9ko8iS2cTnDikLlVwnou9ZEi09Xh0VYAhKjA/S6+USyIfEagEo41pH60JLQSk2OSoo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: OS0PR01MB5409 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Renesas 8T49N241 has 4 outputs, 1 integral and 3 fractional dividers. The 8T49N241 accepts up to two differential or single-ended input clocks and a fundamental-mode crystal input. The internal PLL can lock to either of the input reference clocks or to the crystal to behave as a frequency synthesizer. Signed-off-by: Alex Helms --- .../bindings/clock/renesas,8t49n241.yaml | 190 ++++++++++++++++++ MAINTAINERS | 6 + 2 files changed, 196 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/renesas,8t49n241.yaml diff --git a/Documentation/devicetree/bindings/clock/renesas,8t49n241.yaml b/Documentation/devicetree/bindings/clock/renesas,8t49n241.yaml new file mode 100644 index 000000000..586dd6f5c --- /dev/null +++ b/Documentation/devicetree/bindings/clock/renesas,8t49n241.yaml @@ -0,0 +1,190 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/renesas,8t49n241.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Binding for Renesas 8T49N241 Universal Frequency Translator + +description: | + The 8T49N241 has one fractional-feedback PLL that can be used as a + jitter attenuator and frequency translator. It is equipped with one + integer and three fractional output dividers, allowing the generation + of up to four different output frequencies, ranging from 8kHz to 1GHz. + These frequencies are completely independent of each other, the input + reference frequencies and the crystal reference frequency. The device + places virtually no constraints on input to output frequency conversion, + supporting all FEC rates, including the new revision of ITU-T + Recommendation G.709 (2009), most with 0ppm conversion error. + The outputs may select among LVPECL, LVDS, HCSL or LVCMOS output levels. + + The driver can read a full register map from the DT, and will use that + register map to initialize the attached part (via I2C) when the system + boots. Any configuration not supported by the common clock framework + must be done via the full register map, including optimized settings. + + The 8T49N241 accepts up to two differential or single-ended input clocks + and a fundamental-mode crystal input. The internal PLL can lock to either + of the input reference clocks or just to the crystal to behave as a + frequency synthesizer. The PLL can use the second input for redundant + backup of the primary input reference, but in this case, both input clock + references must be related in frequency. + + All outputs are currently assumed to be LVDS, unless overridden in the + full register map in the DT. + +maintainers: + - Alex Helms + - David Cater + +properties: + compatible: + enum: + - renesas,8t49n241 + + reg: + description: I2C device address + enum: [ 0x7c, 0x6c, 0x7d, 0x6d, 0x7e, 0x6e, 0x7f, 0x6f ] + + '#clock-cells': + const: 1 + + clock-names: + minItems: 1 + maxItems: 3 + items: + enum: [ xtal, clk0, clk1 ] + + clocks: + minItems: 1 + maxItems: 3 + + renesas,settings: + description: Optional, complete register map of the device. + Optimized settings for the device must be provided in full + and are written during initialization. + $ref: /schemas/types.yaml#/definitions/uint8-array + minItems: 791 + maxItems: 791 + +required: + - compatible + - reg + - '#clock-cells' + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + /* 25MHz reference clock */ + clk0: clk0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + renesas8t49n241_1: clock-generator@6c { + compatible = "renesas,8t49n241"; + reg = <0x6c>; + #clock-cells = <1>; + + clocks = <&clk0>; + clock-names = "clk0"; + }; + }; + + /* Consumer referencing the 8T49N241 Q1 */ + consumer { + /* ... */ + clocks = <&renesas8t49n241_1 1>; + /* ... */ + }; + - | + /* 40MHz crystal */ + xtal: xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <40000000>; + }; + + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + renesas8t49n241_2: clock-generator@6c { + compatible = "renesas,8t49n241"; + reg = <0x6c>; + #clock-cells = <1>; + + clocks = <&xtal>; + clock-names = "xtal"; + + renesas,settings=[ + 09 50 00 60 67 C5 6C FF 03 00 30 00 00 01 00 00 + 01 07 00 00 07 00 00 77 6D 06 00 00 00 00 00 FF + FF FF FF 00 3F 00 2A 00 16 33 33 00 01 00 00 D0 + 00 00 00 00 00 00 00 00 00 04 00 00 00 02 00 00 + 00 00 00 00 00 00 00 17 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 D7 0A 2B 20 00 00 00 0B + 00 00 00 00 00 00 00 00 00 00 27 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + C3 00 08 01 00 00 00 00 00 00 00 00 00 30 00 00 + 00 0A 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 85 00 00 9C 01 D4 02 71 07 00 00 00 + 00 83 00 10 02 08 8C + ]; + }; + }; + + /* Consumer referencing the 8T49N241 Q1 */ + consumer { + /* ... */ + clocks = <&renesas8t49n241_2 1>; + /* ... */ + }; diff --git a/MAINTAINERS b/MAINTAINERS index 6c8be735c..55650e67f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15778,6 +15778,12 @@ L: linux-remoteproc@vger.kernel.org S: Maintained F: drivers/net/wwan/rpmsg_wwan_ctrl.c +RENESAS 8T49N24X DRIVER +M: Alex Helms +M: David Cater +S: Odd Fixes +F: Documentation/devicetree/bindings/clock/renesas,8t49n241.yaml + RENESAS CLOCK DRIVERS M: Geert Uytterhoeven L: linux-renesas-soc@vger.kernel.org