| Message ID | 20210827073819.29992-1-wsa+renesas@sang-engineering.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 883e31b6649f9aa6f06222f197f653ab791de09c |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: r8a77961: Add TPU device node | expand |
Hi Wolfram, Thanks for your patch. On 2021-08-27 09:38:19 +0200, Wolfram Sang wrote: > Add the missing TPU node for the R-Car M3-W+ SoC. > > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > > When I wanted to enable TPU on M3-N for some testing, building M3-W+ > DTBs failed due to this missing. > > arch/arm64/boot/dts/renesas/r8a77961.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi > index 91b501e0121e..22da1c0436be 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi > @@ -1367,6 +1367,17 @@ scif5: serial@e6f30000 { > status = "disabled"; > }; > > + tpu: pwm@e6e80000 { > + compatible = "renesas,tpu-r8a77961", "renesas,tpu"; > + reg = <0 0xe6e80000 0 0x148>; > + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 304>; > + power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; > + resets = <&cpg 304>; > + #pwm-cells = <3>; > + status = "disabled"; > + }; > + > msiof0: spi@e6e90000 { > compatible = "renesas,msiof-r8a77961", > "renesas,rcar-gen3-msiof"; > -- > 2.30.2 >
Hi Wolfram, On Fri, Aug 27, 2021 at 9:38 AM Wolfram Sang <wsa+renesas@sang-engineering.com> wrote: > Add the missing TPU node for the R-Car M3-W+ SoC. > > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi > @@ -1367,6 +1367,17 @@ scif5: serial@e6f30000 { > status = "disabled"; > }; > > + tpu: pwm@e6e80000 { > + compatible = "renesas,tpu-r8a77961", "renesas,tpu"; scripts/checkpatch.pl: WARNING: DT compatible string "renesas,tpu-r8a77961" appears un-documented -- check ./Documentation/devicetree/bindings/ #34: FILE: arch/arm64/boot/dts/renesas/r8a77961.dtsi:1371: make dtbs_check: arch/arm64/boot/dts/renesas/r8a77961-ulcb.dt.yaml: pwm@e6e80000: compatible:0: 'renesas,tpu-r8a77961' is not one of ['renesas,tpu-r8a73a4', 'renesas,tpu-r8a7740', 'renesas,tpu-r8a7742', 'renesas,tpu-r8a7743', 'renesas,tpu-r8a7744', 'renesas,tpu-r8a7745', 'renesas,tpu-r8a7790', 'renesas,tpu-r8a7791', 'renesas,tpu-r8a7792', 'renesas,tpu-r8a7793', 'renesas,tpu-r8a7794', 'renesas,tpu-r8a7795', 'renesas,tpu-r8a7796', 'renesas,tpu-r8a77965', 'renesas,tpu-r8a77970', 'renesas,tpu-r8a77980'] Any chance you can send a DT binding update? TIA! > + reg = <0 0xe6e80000 0 0x148>; > + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 304>; > + power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; > + resets = <&cpg 304>; > + #pwm-cells = <3>; > + status = "disabled"; > + }; > + > msiof0: spi@e6e90000 { > compatible = "renesas,msiof-r8a77961", > "renesas,rcar-gen3-msiof"; Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.16. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
> Any chance you can send a DT binding update? TIA!
Sure, will do! Thanks for the pointer.
diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi index 91b501e0121e..22da1c0436be 100644 --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi @@ -1367,6 +1367,17 @@ scif5: serial@e6f30000 { status = "disabled"; }; + tpu: pwm@e6e80000 { + compatible = "renesas,tpu-r8a77961", "renesas,tpu"; + reg = <0 0xe6e80000 0 0x148>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 304>; + power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; + resets = <&cpg 304>; + #pwm-cells = <3>; + status = "disabled"; + }; + msiof0: spi@e6e90000 { compatible = "renesas,msiof-r8a77961", "renesas,rcar-gen3-msiof";
Add the missing TPU node for the R-Car M3-W+ SoC. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> --- When I wanted to enable TPU on M3-N for some testing, building M3-W+ DTBs failed due to this missing. arch/arm64/boot/dts/renesas/r8a77961.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)