diff mbox series

[v2] arm64: dts: renesas: r8a77961: Add lvds0 device node

Message ID 20211214140607.1147976-1-nikita.yoush@cogentembedded.com (mailing list archive)
State Accepted
Delegated to: Geert Uytterhoeven
Headers show
Series [v2] arm64: dts: renesas: r8a77961: Add lvds0 device node | expand

Commit Message

Nikita Yushchenko Dec. 14, 2021, 2:06 p.m. UTC
Add the missing lvds0 node for the R-Car M3-W+ SoC.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
---
Changes in v2:
- fix typo in subject

 arch/arm64/boot/dts/renesas/r8a77961.dtsi | 27 +++++++++++++++++++++++
 1 file changed, 27 insertions(+)

Comments

Geert Uytterhoeven Dec. 20, 2021, 2:21 p.m. UTC | #1
Hi Nikita,

On Tue, Dec 14, 2021 at 3:06 PM Nikita Yushchenko
<nikita.yoush@cogentembedded.com> wrote:
> Add the missing lvds0 node for the R-Car M3-W+ SoC.
>
> Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
> @@ -2718,6 +2718,33 @@ du_out_hdmi0: endpoint {
>                                 port@2 {
>                                         reg = <2>;
>                                         du_out_lvds0: endpoint {
> +                                               remote-endpoint = <&lvds0_in>;
> +                                       };
> +                               };
> +                       };
> +               };
> +
> +               lvds0: lvds@feb90000 {
> +                       compatible = "renesas,r8a7796-lvds";

This should be "renesas,r8a77961-lvds".
To handle that, both the DT bindings[1] and the driver[2] should
be updated.

[1] Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml
[2] drivers/gpu/drm/rcar-du/rcar_lvds.c

> +                       reg = <0 0xfeb90000 0 0x14>;
> +                       clocks = <&cpg CPG_MOD 727>;
> +                       power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
> +                       resets = <&cpg 727>;
> +                       status = "disabled";
> +
> +                       ports {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +
> +                               port@0 {
> +                                       reg = <0>;
> +                                       lvds0_in: endpoint {
> +                                               remote-endpoint = <&du_out_lvds0>;
> +                                       };
> +                               };
> +                               port@1 {
> +                                       reg = <1>;
> +                                       lvds0_out: endpoint {
>                                         };
>                                 };
>                         };

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Nikita Yushchenko Dec. 24, 2021, 5 a.m. UTC | #2
>> +               lvds0: lvds@feb90000 {
>> +                       compatible = "renesas,r8a7796-lvds";
> 
> This should be "renesas,r8a77961-lvds".
> To handle that, both the DT bindings[1] and the driver[2] should
> be updated.
> 
> [1] Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml
> [2] drivers/gpu/drm/rcar-du/rcar_lvds.c

Ok, will redo that way, although I don't really understand what for to have different compatible strings 
for exactly same IP inside different chips.

Also note that arch/arm64/boot/dts/renesas/r8a77951.dtsi currently has renesas,r8a7795-lvds

Nikita
Geert Uytterhoeven Dec. 24, 2021, 9:56 a.m. UTC | #3
Hi Nikita,

On Fri, Dec 24, 2021 at 6:00 AM Nikita Yushchenko
<nikita.yoush@cogentembedded.com> wrote:
> >> +               lvds0: lvds@feb90000 {
> >> +                       compatible = "renesas,r8a7796-lvds";
> >
> > This should be "renesas,r8a77961-lvds".
> > To handle that, both the DT bindings[1] and the driver[2] should
> > be updated.
> >
> > [1] Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml
> > [2] drivers/gpu/drm/rcar-du/rcar_lvds.c
>
> Ok, will redo that way, although I don't really understand what for to have different compatible strings

Thank you!

> for exactly same IP inside different chips.

Ca. 30% of the "presumed identical" IP blocks in R-Car Gen3 SoCs
turned out not to be that identical...

> Also note that arch/arm64/boot/dts/renesas/r8a77951.dtsi currently has renesas,r8a7795-lvds

That was an early judgment error, which we regret making.
Initially, R-Car H3 ES2.0 (r8a77951) was assumed to be a slightly
improved variant of R-Car H3 ES1.x (r8a77950), while it turned out
to be a completely different SoC.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index 86d59e7e1a87..d324dfd0d1f7 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -2718,6 +2718,33 @@  du_out_hdmi0: endpoint {
 				port@2 {
 					reg = <2>;
 					du_out_lvds0: endpoint {
+						remote-endpoint = <&lvds0_in>;
+					};
+				};
+			};
+		};
+
+		lvds0: lvds@feb90000 {
+			compatible = "renesas,r8a7796-lvds";
+			reg = <0 0xfeb90000 0 0x14>;
+			clocks = <&cpg CPG_MOD 727>;
+			power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+			resets = <&cpg 727>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					lvds0_in: endpoint {
+						remote-endpoint = <&du_out_lvds0>;
+					};
+				};
+				port@1 {
+					reg = <1>;
+					lvds0_out: endpoint {
 					};
 				};
 			};