From patchwork Fri Feb 4 16:18:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Jacques Hiblot X-Patchwork-Id: 12735264 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61ED3C2BA4C for ; Fri, 4 Feb 2022 16:18:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376478AbiBDQSW (ORCPT ); Fri, 4 Feb 2022 11:18:22 -0500 Received: from smtpout1.mo528.mail-out.ovh.net ([46.105.34.251]:48461 "EHLO smtpout1.mo528.mail-out.ovh.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1376439AbiBDQSV (ORCPT ); Fri, 4 Feb 2022 11:18:21 -0500 Received: from pro2.mail.ovh.net (unknown [10.109.156.10]) by mo528.mail-out.ovh.net (Postfix) with ESMTPS id E7989E1D4894; Fri, 4 Feb 2022 17:18:18 +0100 (CET) Received: from localhost.localdomain (88.125.132.78) by DAG1EX2.emp2.local (172.16.2.2) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Fri, 4 Feb 2022 17:18:17 +0100 From: Jean-Jacques Hiblot To: , Magnus Damm , Rob Herring CC: Jean-Jacques Hiblot , , , Subject: [PATCH 4/6] ARM: dts: r9a06g032: Add the watchdog nodes Date: Fri, 4 Feb 2022 17:18:02 +0100 Message-ID: <20220204161806.3126321-5-jjhiblot@traphandler.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220204161806.3126321-1-jjhiblot@traphandler.com> References: <20220204161806.3126321-1-jjhiblot@traphandler.com> MIME-Version: 1.0 X-Originating-IP: [88.125.132.78] X-ClientProxiedBy: DAG2EX1.emp2.local (172.16.2.11) To DAG1EX2.emp2.local (172.16.2.2) X-Ovh-Tracer-Id: 5893804537991477723 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedvvddrgeelgdekjecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemucehtddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjughrpefhvffufffkofgjfhgggfgtihesthekredtredttdenucfhrhhomheplfgvrghnqdflrggtqhhuvghsucfjihgslhhothcuoehjjhhhihgslhhothesthhrrghphhgrnhgulhgvrhdrtghomheqnecuggftrfgrthhtvghrnhepfeeugefgieeutdfhvdegveetvdeuvefgveegleeileevveehfeejjeffgfduudeknecukfhppedtrddtrddtrddtpdekkedruddvhedrudefvddrjeeknecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmohguvgepshhmthhpohhuthdphhgvlhhopehprhhovddrmhgrihhlrdhovhhhrdhnvghtpdhinhgvtheptddrtddrtddrtddpmhgrihhlfhhrohhmpehjjhhhihgslhhothesthhrrghphhgrnhgulhgvrhdrtghomhdpnhgspghrtghpthhtohepuddprhgtphhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrgh Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org This SOC includes 2 watchdog controllers (one per A7 core). Signed-off-by: Jean-Jacques Hiblot --- arch/arm/boot/dts/r9a06g032.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index c47896e4ab58..54c91b46a5d0 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -184,6 +184,22 @@ gic: interrupt-controller@44101000 { interrupts = ; }; + + wdt0: watchdog@40008000 { + compatible = "renesas,rzn1-wdt"; + reg = <0x40008000 0x1000>; + interrupts = ; + clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>; + status = "disabled"; + }; + + wdt1: watchdog@40009000 { + compatible = "renesas,rzn1-wdt"; + reg = <0x40009000 0x1000>; + interrupts = ; + clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>; + status = "disabled"; + }; }; timer {