diff mbox series

[2/2] pinctrl: renesas: r8a77990: add drive-strength

Message ID 20220319215706.59519-3-wsa+renesas@sang-engineering.com (mailing list archive)
State Superseded
Delegated to: Geert Uytterhoeven
Headers show
Series pinctrl: renesas: r8a77990: add drive-strength | expand

Commit Message

Wolfram Sang March 19, 2022, 9:57 p.m. UTC
According to HW documentation 2.20 onwards, drive-strength is introduced
to r8a77990. Add it to the pinctrl driver.

Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---

Original BSP commit: f479c5a4e5e5 ("pinctrl: renesas: r8a77990: Add driver-strength for R8A77990")

However, this was incomplete and missed 6 pins of table 6D.6 which were
on a separate page. Adding them simplifies PORT_GP updates a lot.
However, a preparational patch is needed then which is patch 1 of this
series.

 drivers/pinctrl/renesas/pfc-r8a77990.c | 38 ++++++++++++++++++++++++--
 1 file changed, 36 insertions(+), 2 deletions(-)

Comments

kernel test robot March 20, 2022, 12:18 a.m. UTC | #1
Hi Wolfram,

I love your patch! Perhaps something to improve:

[auto build test WARNING on geert-renesas-drivers/renesas-pinctrl]
[also build test WARNING on linusw-pinctrl/devel v5.17-rc8 next-20220318]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Wolfram-Sang/pinctrl-renesas-r8a77990-add-drive-strength/20220320-055908
base:   https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git renesas-pinctrl
config: hexagon-randconfig-r041-20220320 (https://download.01.org/0day-ci/archive/20220320/202203200832.RD8XJhU1-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 217f267efe3082438e698e2f08566b9df8c530fa)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/844a743267be6ab69209101129c05dcb9dfd7c19
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Wolfram-Sang/pinctrl-renesas-r8a77990-add-drive-strength/20220320-055908
        git checkout 844a743267be6ab69209101129c05dcb9dfd7c19
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=hexagon SHELL=/bin/bash drivers/pinctrl/renesas/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/pinctrl/renesas/pfc-r8a77990.c:5033:38: warning: unused variable 'pinmux_drive_regs' [-Wunused-const-variable]
   static const struct pinmux_drive_reg pinmux_drive_regs[] = {
                                        ^
   1 warning generated.


vim +/pinmux_drive_regs +5033 drivers/pinctrl/renesas/pfc-r8a77990.c

  5032	
> 5033	static const struct pinmux_drive_reg pinmux_drive_regs[] = {
  5034		{ PINMUX_DRIVE_REG("DRVCTRL8", 0xe6060320) {
  5035			{ RCAR_GP_PIN(3,  0), 18, 2 },	/* SD0_CLK */
  5036			{ RCAR_GP_PIN(3,  1), 15, 2 },	/* SD0_CMD */
  5037			{ RCAR_GP_PIN(3,  2), 12, 2 },	/* SD0_DAT0 */
  5038			{ RCAR_GP_PIN(3,  3),  9, 2 },	/* SD0_DAT1 */
  5039			{ RCAR_GP_PIN(3,  4),  6, 2 },	/* SD0_DAT2 */
  5040			{ RCAR_GP_PIN(3,  5),  3, 2 },	/* SD0_DAT3 */
  5041			{ RCAR_GP_PIN(3,  6),  0, 2 },	/* SD1_CLK */
  5042		} },
  5043		{ PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) {
  5044			{ RCAR_GP_PIN(3,  7), 29, 2 },	/* SD1_CMD */
  5045			{ RCAR_GP_PIN(3,  8), 26, 2 },	/* SD1_DAT0 */
  5046			{ RCAR_GP_PIN(3,  9), 23, 2 },	/* SD1_DAT1 */
  5047			{ RCAR_GP_PIN(3, 10), 20, 2 },	/* SD1_DAT2 */
  5048			{ RCAR_GP_PIN(3, 11), 17, 2 },	/* SD1_DAT3 */
  5049			{ RCAR_GP_PIN(4,  0), 14, 2 },	/* SD3_CLK */
  5050			{ RCAR_GP_PIN(4,  1), 11, 2 },	/* SD3_CMD */
  5051			{ RCAR_GP_PIN(4,  2),  8, 2 },	/* SD3_DAT0 */
  5052			{ RCAR_GP_PIN(4,  3),  5, 2 },	/* SD3_DAT1 */
  5053			{ RCAR_GP_PIN(4,  4),  2, 2 },	/* SD3_DAT2 */
  5054		} },
  5055		{ PINMUX_DRIVE_REG("DRVCTRL10", 0xe6060328) {
  5056			{ RCAR_GP_PIN(4,  5), 29, 2 },	/* SD3_DAT3 */
  5057			{ RCAR_GP_PIN(4,  6), 26, 2 },	/* SD3_DAT4 */
  5058			{ RCAR_GP_PIN(4,  7), 23, 2 },	/* SD3_DAT5 */
  5059			{ RCAR_GP_PIN(4,  8), 20, 2 },	/* SD3_DAT6 */
  5060			{ RCAR_GP_PIN(4,  9), 17, 2 },	/* SD3_DAT7 */
  5061			{ RCAR_GP_PIN(4, 10), 14, 2 },	/* SD3_DS */
  5062		} },
  5063		{ },
  5064	};
  5065
Wolfram Sang March 20, 2022, 9:17 a.m. UTC | #2
> >> drivers/pinctrl/renesas/pfc-r8a77990.c:5033:38: warning: unused variable 'pinmux_drive_regs' [-Wunused-const-variable]
>    static const struct pinmux_drive_reg pinmux_drive_regs[] = {

Right, G2E has drive_regs as well. Will update!
diff mbox series

Patch

diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c
index f44c7da3ec16..cc825100f2fe 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77990.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77990.c
@@ -22,12 +22,12 @@ 
 	PORT_GP_CFG_18(0, fn, sfx, CFG_FLAGS), \
 	PORT_GP_CFG_23(1, fn, sfx, CFG_FLAGS), \
 	PORT_GP_CFG_26(2, fn, sfx, CFG_FLAGS), \
-	PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \
+	PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_DRIVE_STRENGTH), \
 	PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS), \
 	PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS), \
 	PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS), \
 	PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS), \
-	PORT_GP_CFG_11(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \
+	PORT_GP_CFG_11(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_DRIVE_STRENGTH), \
 	PORT_GP_CFG_20(5, fn, sfx, CFG_FLAGS), \
 	PORT_GP_CFG_9(6, fn, sfx, CFG_FLAGS), \
 	PORT_GP_CFG_1(6, 9, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
@@ -5104,6 +5104,39 @@  static const struct pinmux_cfg_reg pinmux_config_regs[] = {
 	{ },
 };
 
+static const struct pinmux_drive_reg pinmux_drive_regs[] = {
+	{ PINMUX_DRIVE_REG("DRVCTRL8", 0xe6060320) {
+		{ RCAR_GP_PIN(3,  0), 18, 2 },	/* SD0_CLK */
+		{ RCAR_GP_PIN(3,  1), 15, 2 },	/* SD0_CMD */
+		{ RCAR_GP_PIN(3,  2), 12, 2 },	/* SD0_DAT0 */
+		{ RCAR_GP_PIN(3,  3),  9, 2 },	/* SD0_DAT1 */
+		{ RCAR_GP_PIN(3,  4),  6, 2 },	/* SD0_DAT2 */
+		{ RCAR_GP_PIN(3,  5),  3, 2 },	/* SD0_DAT3 */
+		{ RCAR_GP_PIN(3,  6),  0, 2 },	/* SD1_CLK */
+	} },
+	{ PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) {
+		{ RCAR_GP_PIN(3,  7), 29, 2 },	/* SD1_CMD */
+		{ RCAR_GP_PIN(3,  8), 26, 2 },	/* SD1_DAT0 */
+		{ RCAR_GP_PIN(3,  9), 23, 2 },	/* SD1_DAT1 */
+		{ RCAR_GP_PIN(3, 10), 20, 2 },	/* SD1_DAT2 */
+		{ RCAR_GP_PIN(3, 11), 17, 2 },	/* SD1_DAT3 */
+		{ RCAR_GP_PIN(4,  0), 14, 2 },	/* SD3_CLK */
+		{ RCAR_GP_PIN(4,  1), 11, 2 },	/* SD3_CMD */
+		{ RCAR_GP_PIN(4,  2),  8, 2 },	/* SD3_DAT0 */
+		{ RCAR_GP_PIN(4,  3),  5, 2 },	/* SD3_DAT1 */
+		{ RCAR_GP_PIN(4,  4),  2, 2 },	/* SD3_DAT2 */
+	} },
+	{ PINMUX_DRIVE_REG("DRVCTRL10", 0xe6060328) {
+		{ RCAR_GP_PIN(4,  5), 29, 2 },	/* SD3_DAT3 */
+		{ RCAR_GP_PIN(4,  6), 26, 2 },	/* SD3_DAT4 */
+		{ RCAR_GP_PIN(4,  7), 23, 2 },	/* SD3_DAT5 */
+		{ RCAR_GP_PIN(4,  8), 20, 2 },	/* SD3_DAT6 */
+		{ RCAR_GP_PIN(4,  9), 17, 2 },	/* SD3_DAT7 */
+		{ RCAR_GP_PIN(4, 10), 14, 2 },	/* SD3_DS */
+	} },
+	{ },
+};
+
 enum ioctrl_regs {
 	POCCTRL0,
 	TDSELCTRL,
@@ -5387,6 +5420,7 @@  const struct sh_pfc_soc_info r8a77990_pinmux_info = {
 		ARRAY_SIZE(pinmux_functions.automotive),
 
 	.cfg_regs = pinmux_config_regs,
+	.drive_regs = pinmux_drive_regs,
 	.bias_regs = pinmux_bias_regs,
 	.ioctrl_regs = pinmux_ioctrl_regs,