| Message ID | 20220414122250.158113-12-clement.leger@bootlin.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | add support for Renesas RZ/N1 ethernet subsystem devices | expand |
Hi Clément, On Thu, Apr 14, 2022 at 2:25 PM Clément Léger <clement.leger@bootlin.com> wrote: > Add description of the switch that is present on the RZ/N1 SoC. > > Signed-off-by: Clément Léger <clement.leger@bootlin.com> Thanks for your patch! > --- a/arch/arm/boot/dts/r9a06g032.dtsi > +++ b/arch/arm/boot/dts/r9a06g032.dtsi > @@ -250,6 +250,17 @@ mii_conv4: mii-conv@4 { > }; > }; > > + switch: switch@44050000 { > + compatible = "renesas,rzn1-a5psw"; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x44050000 0x10000>; > + clocks = <&sysctrl R9A06G032_HCLK_SWITCH>, > + <&sysctrl R9A06G032_CLK_SWITCH>; > + clock-names = "hclk_switch", "clk_switch"; "make dtbs_check": arch/arm/boot/dts/r9a06g032-rzn1d400-db.dtb: switch@44050000: clock-names:0: 'hclk' was expected arch/arm/boot/dts/r9a06g032-rzn1d400-db.dtb: switch@44050000: clock-names:1: 'clk' was expected From schema: Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml > + status = "disabled"; > + }; > + > gic: interrupt-controller@44101000 { > compatible = "arm,gic-400", "arm,cortex-a7-gic"; > interrupt-controller; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 9be55957b8e5..c04b382a20f0 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -250,6 +250,17 @@ mii_conv4: mii-conv@4 { }; }; + switch: switch@44050000 { + compatible = "renesas,rzn1-a5psw"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x44050000 0x10000>; + clocks = <&sysctrl R9A06G032_HCLK_SWITCH>, + <&sysctrl R9A06G032_CLK_SWITCH>; + clock-names = "hclk_switch", "clk_switch"; + status = "disabled"; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller;
Add description of the switch that is present on the RZ/N1 SoC. Signed-off-by: Clément Léger <clement.leger@bootlin.com> --- arch/arm/boot/dts/r9a06g032.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)