diff mbox series

[v2] arm64: dts: renesas: r9a07g043: Add SPI Multi I/O Bus controller node

Message ID 20220502190155.84496-1-biju.das.jz@bp.renesas.com (mailing list archive)
State Mainlined
Commit 5d9b15dd707236e8611ab3bf865848f639174136
Delegated to: Geert Uytterhoeven
Headers show
Series [v2] arm64: dts: renesas: r9a07g043: Add SPI Multi I/O Bus controller node | expand

Commit Message

Biju Das May 2, 2022, 7:01 p.m. UTC
Add SPI Multi I/O Bus controller node to R9A07G043 (RZ/G2UL) SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
V1->v2:
 * Removed interrupts property as interrupt is not supported on RZ/G2UL.
---
 arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

Comments

Geert Uytterhoeven May 3, 2022, 7:24 a.m. UTC | #1
On Mon, May 2, 2022 at 9:02 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add SPI Multi I/O Bus controller node to R9A07G043 (RZ/G2UL) SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> V1->v2:
>  * Removed interrupts property as interrupt is not supported on RZ/G2UL.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.19.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index 9048edb5e2b1..b31fb713ae4d 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -498,12 +498,19 @@  tsu: thermal@10059400 {
 		};
 
 		sbc: spi@10060000 {
+			compatible = "renesas,r9a07g043-rpc-if",
+				     "renesas,rzg2l-rpc-if";
 			reg = <0 0x10060000 0 0x10000>,
 			      <0 0x20000000 0 0x10000000>,
 			      <0 0x10070000 0 0x10000>;
+			reg-names = "regs", "dirmap", "wbuf";
+			clocks = <&cpg CPG_MOD R9A07G043_SPI_CLK2>,
+				 <&cpg CPG_MOD R9A07G043_SPI_CLK>;
+			resets = <&cpg R9A07G043_SPI_RST>;
+			power-domains = <&cpg>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			/* place holder */
+			status = "disabled";
 		};
 
 		cpg: clock-controller@11010000 {