From patchwork Wed May 4 09:29:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 12837525 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9794FC4321E for ; Wed, 4 May 2022 09:32:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347604AbiEDJgO (ORCPT ); Wed, 4 May 2022 05:36:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347407AbiEDJgG (ORCPT ); Wed, 4 May 2022 05:36:06 -0400 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::222]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7EB8926AD0; Wed, 4 May 2022 02:31:49 -0700 (PDT) Received: (Authenticated sender: clement.leger@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 9909040009; Wed, 4 May 2022 09:31:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1651656708; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=soDboB9DWxlVYRLAIcf9X7Cg0zqH7bqMjupHg+DQbB0=; b=pKOlzpvnXj3VnxBFVNd+j/jmParJ08nl90LMMgOoJwcItcuMIQrT5lO8qwcWTQqJx31FWj rhXkpPAZb6wtyRXm0NaPN9iFo+1Ro51Q78IlgR6k4U/2V7HKa+3Hf2iT8w3Fu+4nDVLsPw pPmAYaWgC2X6GjlR4ZfUEnU/gjW78IE0ZhW3pong6TZJzcSMAUMKPwl8jIfkKs+IPkarBk Qnrs8f9vyIzzHwIfIjC5UFas3UElRBWfDfzSF2bLRLE14O4Rw9k7ENZLv37X0AiOXAVaOa gKgAmdG3ol8pO6rjC3UuatnMFVyrHateoLK3+cBGR2i7scUeUKBV0b/099pUbA== From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Heiner Kallweit , Russell King Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Thomas Petazzoni , Herve Codina , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org Subject: [PATCH net-next v3 11/12] ARM: dts: r9a06g032: describe switch Date: Wed, 4 May 2022 11:29:59 +0200 Message-Id: <20220504093000.132579-12-clement.leger@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220504093000.132579-1-clement.leger@bootlin.com> References: <20220504093000.132579-1-clement.leger@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add description of the switch that is present on the RZ/N1 SoC. Signed-off-by: Clément Léger --- arch/arm/boot/dts/r9a06g032.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 21246a48a66b..ce13b29f5c10 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -256,6 +256,15 @@ mii_conv5: mii-conv@5 { }; }; + switch: switch@44050000 { + compatible = "renesas,r9a06g032-a5psw", "renesas,rzn1-a5psw"; + reg = <0x44050000 0x10000>; + clocks = <&sysctrl R9A06G032_HCLK_SWITCH>, + <&sysctrl R9A06G032_CLK_SWITCH>; + clock-names = "hclk", "clk"; + status = "disabled"; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller;