| Message ID | 20220512072649.7879-1-phil.edworthy@renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | [v5] dt-bindings: serial: renesas,em-uart: Add RZ/V2M clock to access the registers | expand |
On Thu, 12 May 2022 08:26:49 +0100, Phil Edworthy wrote: > The RZ/V2M SoC has an additional clock to access the registers. The HW > manual says this clock should not be touched as it is used by the > "ISP Firmware". > > Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > v5: > - Move clock properites to top level > v4: > - Removed "optional" from description of clock to access the registers > v3: > - New patch added > --- > .../bindings/serial/renesas,em-uart.yaml | 28 +++++++++++++++---- > 1 file changed, 23 insertions(+), 5 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml b/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml index 332c385618e1..b25aca733b72 100644 --- a/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml @@ -9,9 +9,6 @@ title: Renesas EMMA Mobile UART Interface maintainers: - Magnus Damm <magnus.damm@gmail.com> -allOf: - - $ref: serial.yaml# - properties: compatible: oneOf: @@ -30,10 +27,31 @@ properties: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + items: + - description: UART functional clock + - description: Internal clock to access the registers clock-names: - const: sclk + minItems: 1 + items: + - const: sclk + - const: pclk + +allOf: + - $ref: serial.yaml# + + - if: + properties: + compatible: + contains: + const: renesas,r9a09g011-uart + then: + properties: + clocks: + minItems: 2 + clock-names: + minItems: 2 required: - compatible