diff mbox series

clk: renesas: r8a779f0: Add HSCIF0+1 clocks

Message ID 20220613130949.10001-1-wsa+renesas@sang-engineering.com (mailing list archive)
State Superseded
Delegated to: Geert Uytterhoeven
Headers show
Series clk: renesas: r8a779f0: Add HSCIF0+1 clocks | expand

Commit Message

Wolfram Sang June 13, 2022, 1:09 p.m. UTC
Those have been successfully tested. HSCIF2+3 still need verification.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 drivers/clk/renesas/r8a779f0-cpg-mssr.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Wolfram Sang June 13, 2022, 8:04 p.m. UTC | #1
On Mon, Jun 13, 2022 at 03:09:49PM +0200, Wolfram Sang wrote:
> Those have been successfully tested. HSCIF2+3 still need verification.

I managed to test all other HSCIFs and SCIFs now. I'll resend the
updated patches tomorrow.
diff mbox series

Patch

diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
index 0aec5e8ffd96..a7c16e72515f 100644
--- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
@@ -118,6 +118,8 @@  static const struct cpg_core_clk r8a779f0_core_clks[] __initconst = {
 };
 
 static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = {
+	DEF_MOD("hscif0",	514,	R8A779F0_CLK_S0D3),
+	DEF_MOD("hscif1",	515,	R8A779F0_CLK_S0D3),
 	DEF_MOD("i2c0",		518,	R8A779F0_CLK_S0D6_PER),
 	DEF_MOD("i2c1",		519,	R8A779F0_CLK_S0D6_PER),
 	DEF_MOD("i2c2",		520,	R8A779F0_CLK_S0D6_PER),