diff mbox series

[v4,05/10] riscv: Kconfig.socs: Add ARCH_RENESAS kconfig option

Message ID 20220920184904.90495-6-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)
State Superseded
Delegated to: Geert Uytterhoeven
Headers show
Series Add support for Renesas RZ/Five SoC | expand

Commit Message

Lad, Prabhakar Sept. 20, 2022, 6:48 p.m. UTC 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add ARCH_RENESAS config option to allow selecting the Renesas RISC-V SoCs.
We currently have the newly added RZ/Five (R9A07G043) RISC-V based SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v3 -> v4
* Dropped SOC_RENESAS_RZFIVE config option
* Dropped explicitly selecting SOC_BUS/GPIOLIB/PINCTRL configs
  under ARCH_RENESAS
* Updated commit message
* Dropped RB tag
* Used riscv instead of RISC-V in subject line

v2 -> v3
* Included RB tag from Geert

v1 -> v2
* No Change
---
 arch/riscv/Kconfig.socs | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Conor Dooley Sept. 20, 2022, 7:04 p.m. UTC | #1 
On Tue, Sep 20, 2022 at 07:48:59PM +0100, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Add ARCH_RENESAS config option to allow selecting the Renesas RISC-V SoCs.
> We currently have the newly added RZ/Five (R9A07G043) RISC-V based SoC.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> v3 -> v4
> * Dropped SOC_RENESAS_RZFIVE config option
> * Dropped explicitly selecting SOC_BUS/GPIOLIB/PINCTRL configs
>   under ARCH_RENESAS
> * Updated commit message
> * Dropped RB tag
> * Used riscv instead of RISC-V in subject line
> 
> v2 -> v3
> * Included RB tag from Geert
> 
> v1 -> v2
> * No Change
> ---
>  arch/riscv/Kconfig.socs | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 69774bb362d6..5c420ed55ef9 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -80,4 +80,9 @@ config SOC_CANAAN_K210_DTB_SOURCE
>  
>  endif # SOC_CANAAN

I am not asking for a respin for this since no-one likely cares, but
I think a future goal would be to sort the file alphabetically. I'll
probably do it with the other 30-something patches my Kconfig.socs
rework series has got to now - but if you *are* respinning sorting
alphabetically (ignoring the CANAAN) would reduce future churn.

Thanks,
Conor.

>  
> +config ARCH_RENESAS
> +	bool "Renesas RISC-V SoCs"
> +	help
> +	  This enables support for the RISC-V based Renesas SoCs.
> +
>  endmenu # "SoC selection"
> -- 
> 2.25.1
> 
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Lad, Prabhakar Sept. 20, 2022, 9:04 p.m. UTC | #2 
Hi Conor,

Thank you for the review.

On Tue, Sep 20, 2022 at 8:04 PM Conor Dooley <conor@kernel.org> wrote:
>
> On Tue, Sep 20, 2022 at 07:48:59PM +0100, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Add ARCH_RENESAS config option to allow selecting the Renesas RISC-V SoCs.
> > We currently have the newly added RZ/Five (R9A07G043) RISC-V based SoC.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > v3 -> v4
> > * Dropped SOC_RENESAS_RZFIVE config option
> > * Dropped explicitly selecting SOC_BUS/GPIOLIB/PINCTRL configs
> >   under ARCH_RENESAS
> > * Updated commit message
> > * Dropped RB tag
> > * Used riscv instead of RISC-V in subject line
> >
> > v2 -> v3
> > * Included RB tag from Geert
> >
> > v1 -> v2
> > * No Change
> > ---
> >  arch/riscv/Kconfig.socs | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> > index 69774bb362d6..5c420ed55ef9 100644
> > --- a/arch/riscv/Kconfig.socs
> > +++ b/arch/riscv/Kconfig.socs
> > @@ -80,4 +80,9 @@ config SOC_CANAAN_K210_DTB_SOURCE
> >
> >  endif # SOC_CANAAN
>
> I am not asking for a respin for this since no-one likely cares, but
> I think a future goal would be to sort the file alphabetically. I'll
> probably do it with the other 30-something patches my Kconfig.socs
> rework series has got to now - but if you *are* respinning sorting
> alphabetically (ignoring the CANAAN) would reduce future churn.
>
To clarify, shall I add ARCH_RENESAS to the beginning of the file or
after the SOC_MICROCHIP_POLARFIRE config?

As rest of the configs start with SOC and for Renesas it starts with
ARCH, so to avoid another re-spin hence this query.

Cheers,
Prabhakar
Conor Dooley Sept. 20, 2022, 9:10 p.m. UTC | #3 
On Tue, Sep 20, 2022 at 10:04:06PM +0100, Lad, Prabhakar wrote:
> To clarify, shall I add ARCH_RENESAS to the beginning of the file or
> after the SOC_MICROCHIP_POLARFIRE config?
> 
> As rest of the configs start with SOC and for Renesas it starts with
> ARCH, so to avoid another re-spin hence this query.

I'd say sort it based on Renesas so that everything else can be swapped
over in place. I don't care that much to be honest, was just an "if
you're already respinning" kind of thing.

Thanks,
Conor.
diff mbox series

Patch

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 69774bb362d6..5c420ed55ef9 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -80,4 +80,9 @@  config SOC_CANAAN_K210_DTB_SOURCE
 
 endif # SOC_CANAAN
 
+config ARCH_RENESAS
+	bool "Renesas RISC-V SoCs"
+	help
+	  This enables support for the RISC-V based Renesas SoCs.
+
 endmenu # "SoC selection"