| Message ID | 20221107175305.63975-5-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Add IRQC support to RZ/G2UL SoC | expand |
Hi Prabhakar, On Mon, Nov 7, 2022 at 6:53 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Add required properties in pinctrl node to handle GPIO interrupts. > > Note as IRQC is not enabled in RZ/Five the phandle for interrupt-parent > is added in RZ/G2UL specific dtsi so that RZ/Five pinctrl driver > continues without waiting for IRQC to probe. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi > +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi > @@ -531,6 +531,8 @@ pinctrl: pinctrl@11030000 { > gpio-controller; > #gpio-cells = <2>; > gpio-ranges = <&pinctrl 0 0 152>; > + #interrupt-cells = <2>; > + interrupt-controller; > clocks = <&cpg CPG_MOD R9A07G043_GPIO_HCLK>; > power-domains = <&cpg>; > resets = <&cpg R9A07G043_GPIO_RSTN>, > diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi > index 7a8ed7ae253b..65e7b029361e 100644 > --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi > +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi > @@ -98,6 +98,10 @@ &irqc { > resets = <&cpg R9A07G043_IA55_RESETN>; > }; > > +&pinctrl { > + interrupt-parent = <&irqc>; > +}; Do you plan to move it back to the common r9a07g043.dtsi later? Perhaps it makes sense to move the full irqc node to r9a07g043[uf].dtsi? There is not that much common left, even the compatible value differs. We don't keep the few common properties of the cpu0 node in r9a07g043.dtsi neither. > + > &soc { > interrupt-parent = <&gic>; > Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert, Thank you for the review. On Thu, Nov 17, 2022 at 11:20 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Prabhakar, > > On Mon, Nov 7, 2022 at 6:53 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > Add required properties in pinctrl node to handle GPIO interrupts. > > > > Note as IRQC is not enabled in RZ/Five the phandle for interrupt-parent > > is added in RZ/G2UL specific dtsi so that RZ/Five pinctrl driver > > continues without waiting for IRQC to probe. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Thanks for your patch! > > > --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi > > +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi > > @@ -531,6 +531,8 @@ pinctrl: pinctrl@11030000 { > > gpio-controller; > > #gpio-cells = <2>; > > gpio-ranges = <&pinctrl 0 0 152>; > > + #interrupt-cells = <2>; > > + interrupt-controller; > > clocks = <&cpg CPG_MOD R9A07G043_GPIO_HCLK>; > > power-domains = <&cpg>; > > resets = <&cpg R9A07G043_GPIO_RSTN>, > > diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi > > index 7a8ed7ae253b..65e7b029361e 100644 > > --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi > > +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi > > @@ -98,6 +98,10 @@ &irqc { > > resets = <&cpg R9A07G043_IA55_RESETN>; > > }; > > > > +&pinctrl { > > + interrupt-parent = <&irqc>; > > +}; > > Do you plan to move it back to the common r9a07g043.dtsi later? Yes we should be doing that. > Perhaps it makes sense to move the full irqc node to r9a07g043[uf].dtsi? > There is not that much common left, even the compatible value differs. > We don't keep the few common properties of the cpu0 node in > r9a07g043.dtsi neither. > Agreed, I will move it in the next version. Cheers, Prabhakar
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi index 44b9bc6294be..afb1abaa8b9a 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi @@ -531,6 +531,8 @@ pinctrl: pinctrl@11030000 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pinctrl 0 0 152>; + #interrupt-cells = <2>; + interrupt-controller; clocks = <&cpg CPG_MOD R9A07G043_GPIO_HCLK>; power-domains = <&cpg>; resets = <&cpg R9A07G043_GPIO_RSTN>, diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi index 7a8ed7ae253b..65e7b029361e 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi @@ -98,6 +98,10 @@ &irqc { resets = <&cpg R9A07G043_IA55_RESETN>; }; +&pinctrl { + interrupt-parent = <&irqc>; +}; + &soc { interrupt-parent = <&gic>;