@@ -69,6 +69,36 @@ gic: interrupt-controller@82010000 {
clock-names = "clk";
};
+ usb3drd: usb@85070000 {
+ compatible = "renesas,r9a09g011-usb3drd",
+ "renesas,rzv2m-usb3drd";
+ reg = <0x0 0x85070000 0x0 0x1000>;
+ clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_P>,
+ <&cpg CPG_MOD R9A09G011_USB_PCLK>;
+ clock-names = "peri_axi", "apb";
+ resets = <&cpg R9A09G011_USB_DRD_RESET>,
+ <&cpg R9A09G011_USB_ARESETN_P>;
+ reset-names = "drd_reset", "aresetn_p";
+ power-domains = <&cpg>;
+ ranges;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ status = "disabled";
+
+ usb3host: usb@85060000 {
+ compatible = "renesas,r9a09g011-xhci",
+ "renesas,rzv2m-xhci";
+ reg = <0 0x85060000 0 0x2000>;
+ interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_H>,
+ <&cpg CPG_MOD R9A09G011_USB_PCLK>;
+ clock-names = "host_axi", "reg";
+ resets = <&cpg R9A09G011_USB_ARESETN_H>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+ };
+
avb: ethernet@a3300000 {
compatible = "renesas,etheravb-r9a09g011","renesas,etheravb-rzv2m";
reg = <0 0xa3300000 0 0x800>;
This patch add usb3 host node as child of usb3 drd node to RZ/V2M SoC dtsi. The host needs to issue reset release on DRD module before accessing host registers. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+)