| Message ID | 20230105183319.144366-2-fabrizio.castro.jz@renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Driver support for RZ/V2M PWC | expand |
I need to move the dt-bindings document to a different location. I'll send a v4 to fix this issue. Thanks, Fab > > The Renesas RZ/V2M External Power Sequence Controller (PWC) > IP is a multi-function device, and it's capable of: > * external power supply on/off sequence generation > * on/off signal generation for the LPDDR4 core power supply (LPVDD) > * key input signals processing > * general-purpose output pins > > Add the corresponding dt-bindings. > > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> > Reviewed-by: Rob Herring <robh@kernel.org> > --- > > v1->v2: I have dropped syscon, simple-mfd, regmap, offset, and the child > nodes. > v2->v3: No change. > > .../bindings/mfd/renesas,rzv2m-pwc.yaml | 56 +++++++++++++++++++ > 1 file changed, 56 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/renesas,rzv2m- > pwc.yaml > > diff --git a/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml > b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml > new file mode 100644 > index 000000000000..e6794c5152d5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml > @@ -0,0 +1,56 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: > https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetre > e.org%2Fschemas%2Fmfd%2Frenesas%2Crzv2m- > pwc.yaml%23&data=05%7C01%7Cfabrizio.castro.jz%40renesas.com%7Cfa21d14e818f > 446be6fe08daef4b611f%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%7C63808540 > 4270173899%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJ > BTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=B0Ev3%2BkIYpOz%2FVEQR1Px > JDbMvh%2BcRTZc5IrWKV742Cc%3D&reserved=0 > +$schema: > https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetre > e.org%2Fmeta- > schemas%2Fcore.yaml%23&data=05%7C01%7Cfabrizio.castro.jz%40renesas.com%7Cf > a21d14e818f446be6fe08daef4b611f%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0 > %7C638085404270173899%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoi > V2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=1bkDZKNx%2F5O > TmPFUeFIM%2Bivg0b2DVkzjFEuIBY%2F%2B2Bg%3D&reserved=0 > + > +title: Renesas RZ/V2M External Power Sequence Controller (PWC) > + > +description: |+ > + The PWC IP found in the RZ/V2M family of chips comes with the below > + capabilities > + - external power supply on/off sequence generation > + - on/off signal generation for the LPDDR4 core power supply (LPVDD) > + - key input signals processing > + - general-purpose output pins > + > +maintainers: > + - Fabrizio Castro <fabrizio.castro.jz@renesas.com> > + > +properties: > + compatible: > + items: > + - enum: > + - renesas,r9a09g011-pwc # RZ/V2M > + - renesas,r9a09g055-pwc # RZ/V2MA > + - const: renesas,rzv2m-pwc > + > + reg: > + maxItems: 1 > + > + gpio-controller: true > + > + '#gpio-cells': > + const: 2 > + > + renesas,rzv2m-pwc-power: > + description: The PWC is used to control the system power supplies. > + type: boolean > + > +required: > + - compatible > + - reg > + - gpio-controller > + - '#gpio-cells' > + > +additionalProperties: false > + > +examples: > + - | > + pwc: pwc@a3700000 { > + compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc"; > + reg = <0xa3700000 0x800>; > + gpio-controller; > + #gpio-cells = <2>; > + renesas,rzv2m-pwc-power; > + }; > -- > 2.34.1
diff --git a/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml new file mode 100644 index 000000000000..e6794c5152d5 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/renesas,rzv2m-pwc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/V2M External Power Sequence Controller (PWC) + +description: |+ + The PWC IP found in the RZ/V2M family of chips comes with the below + capabilities + - external power supply on/off sequence generation + - on/off signal generation for the LPDDR4 core power supply (LPVDD) + - key input signals processing + - general-purpose output pins + +maintainers: + - Fabrizio Castro <fabrizio.castro.jz@renesas.com> + +properties: + compatible: + items: + - enum: + - renesas,r9a09g011-pwc # RZ/V2M + - renesas,r9a09g055-pwc # RZ/V2MA + - const: renesas,rzv2m-pwc + + reg: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + renesas,rzv2m-pwc-power: + description: The PWC is used to control the system power supplies. + type: boolean + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + +additionalProperties: false + +examples: + - | + pwc: pwc@a3700000 { + compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc"; + reg = <0xa3700000 0x800>; + gpio-controller; + #gpio-cells = <2>; + renesas,rzv2m-pwc-power; + };