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[3/3] arm64: dts: beacon-renesom: Fix some audio messages

Message ID 20230114225647.227972-3-aford173@gmail.com (mailing list archive)
State Mainlined
Commit 5b06e1cb0eba21179ba9f92027a91675049b75c4
Delegated to: Geert Uytterhoeven
Headers show
Series [1/3] arm64: dts: beacon-renesom: Fix gpio expander reference | expand

Commit Message

Adam Ford Jan. 14, 2023, 10:56 p.m. UTC
The WM8962 is configured so the SoC is driving the clock, and it's
currently set to 24 MHz.  However, when playing audio it shows the
following message:
    wm8962 5-001a: Unsupported sysclk ratio 500

While not harmful, a better clock ratio is 512.  It makes the
message disappear, and it still plays sound.

Signed-off-by: Adam Ford <aford173@gmail.com>

Comments

Geert Uytterhoeven Jan. 16, 2023, 10:38 a.m. UTC | #1
On Sat, Jan 14, 2023 at 11:56 PM Adam Ford <aford173@gmail.com> wrote:
> The WM8962 is configured so the SoC is driving the clock, and it's
> currently set to 24 MHz.  However, when playing audio it shows the
> following message:
>     wm8962 5-001a: Unsupported sysclk ratio 500
>
> While not harmful, a better clock ratio is 512.  It makes the
> message disappear, and it still plays sound.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.3.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
index 518885cb1e7e..e0b9aee8e181 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
@@ -367,7 +367,7 @@  versaclock6_bb: clock-controller@6a {
 
 		assigned-clocks = <&versaclock6_bb 1>, <&versaclock6_bb 2>,
 				  <&versaclock6_bb 3>, <&versaclock6_bb 4>;
-		assigned-clock-rates = <24000000>, <24000000>, <24000000>,
+		assigned-clock-rates = <24000000>, <24000000>, <24576000>,
 				       <24576000>;
 
 		OUT1 {