| Message ID | 20230123013448.1250991-4-yoshihiro.shimoda.uh@renesas.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 432d5fedafe686c9894f303107473938856b0a4b |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: Add/update IPMMU support for R-Car Gen4 | expand |
Hi Geert-san, > From: Yoshihiro Shimoda, Sent: Monday, January 23, 2023 10:35 AM > > Add IPMMU nodes for r8a779g0. > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > --- > arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 109 ++++++++++++++++++++++ > 1 file changed, 109 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi > index 83d1666a2ea1..631192dec514 100644 > --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi > @@ -1162,6 +1162,115 @@ dmac1: dma-controller@e7351000 { > dma-channels = <16>; > }; > > + ipmmu_rt0: iommu@ee480000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xee480000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 4>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_rt1: iommu@ee4c0000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xee4c0000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 5>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_ds0: iommu@eed00000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeed00000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 6>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_hsc: iommu@eed40000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeed40000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 7>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_ir: iommu@eed80000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeed80000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 3>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; The power-domains should be R8A779G0_PD_A3IR. So, I'll send v2 patch after we discussed updating dt-bindings of "renesas,ipmmu-main". Best regards, Yoshihiro Shimoda > + #iommu-cells = <1>; > + }; > + > + ipmmu_vc0: iommu@eedc0000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeedc0000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 2>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_3dg: iommu@eee00000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeee00000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 10>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_vi0: iommu@eee80000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeee80000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 0>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_vi1: iommu@eeec0000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeeec0000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 1>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_vip0: iommu@eef00000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeef00000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 8>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_vip1: iommu@eef40000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeef40000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 8>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_mm: iommu@eefc0000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeefc0000 0 0x20000>; > + interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > mmc0: mmc@ee140000 { > compatible = "renesas,sdhi-r8a779g0", > "renesas,rcar-gen4-sdhi"; > -- > 2.25.1
Hi Shimoda-san, On Mon, Jan 23, 2023 at 2:38 AM Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> wrote: > Add IPMMU nodes for r8a779g0. > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi > @@ -1162,6 +1162,115 @@ dmac1: dma-controller@e7351000 { > dma-channels = <16>; > }; > > + ipmmu_rt0: iommu@ee480000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xee480000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 4>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_rt1: iommu@ee4c0000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xee4c0000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 5>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_ds0: iommu@eed00000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeed00000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 6>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_hsc: iommu@eed40000 { ipmmu_hc? > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeed40000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 7>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_ir: iommu@eed80000 { > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeed80000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 3>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; > + > + ipmmu_vc0: iommu@eedc0000 { ipmmu_vc? > + compatible = "renesas,ipmmu-r8a779g0", > + "renesas,rcar-gen4-ipmmu-vmsa"; > + reg = <0 0xeedc0000 0 0x20000>; > + renesas,ipmmu-main = <&ipmmu_mm 2>; > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > + #iommu-cells = <1>; > + }; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Shimoda-san, On Wed, Jan 25, 2023 at 1:52 AM Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> wrote: > > From: Yoshihiro Shimoda, Sent: Monday, January 23, 2023 10:35 AM > > > > Add IPMMU nodes for r8a779g0. > > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > > --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi > > +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi > > + ipmmu_ir: iommu@eed80000 { > > + compatible = "renesas,ipmmu-r8a779g0", > > + "renesas,rcar-gen4-ipmmu-vmsa"; > > + reg = <0 0xeed80000 0 0x20000>; > > + renesas,ipmmu-main = <&ipmmu_mm 3>; > > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > > The power-domains should be R8A779G0_PD_A3IR. > So, I'll send v2 patch after we discussed updating dt-bindings of "renesas,ipmmu-main". The binding update is commit b67ab6fb63bbbe6d ("dt-bindings: iommu: renesas, ipmmu-vmsa: Update for R-Car Gen4") in iommu/next. Do you still plan to send a v2, or shall I fix this (+ removal of renesas,ipmmu-main indices) while applying? Thanks! Gr{oetje,eeting}s, Geert
Hi Geert-san, > From: Geert Uytterhoeven, Sent: Tuesday, April 4, 2023 4:21 PM > > Hi Shimoda-san, > > On Wed, Jan 25, 2023 at 1:52 AM Yoshihiro Shimoda > <yoshihiro.shimoda.uh@renesas.com> wrote: > > > From: Yoshihiro Shimoda, Sent: Monday, January 23, 2023 10:35 AM > > > > > > Add IPMMU nodes for r8a779g0. > > > > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > > > > --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi > > > +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi > > > > + ipmmu_ir: iommu@eed80000 { > > > + compatible = "renesas,ipmmu-r8a779g0", > > > + "renesas,rcar-gen4-ipmmu-vmsa"; > > > + reg = <0 0xeed80000 0 0x20000>; > > > + renesas,ipmmu-main = <&ipmmu_mm 3>; > > > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > > > > The power-domains should be R8A779G0_PD_A3IR. > > So, I'll send v2 patch after we discussed updating dt-bindings of "renesas,ipmmu-main". > > The binding update is commit b67ab6fb63bbbe6d ("dt-bindings: iommu: > renesas, ipmmu-vmsa: Update for R-Car Gen4") in iommu/next. > > Do you still plan to send a v2, or shall I fix this (+ removal of > renesas,ipmmu-main indices) while applying? I said I will send a v2, but I'm happy if you will fix this while applying. Best regards, Yoshihiro Shimoda > Thanks! > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
Hi Shimoda-san, On Tue, Apr 4, 2023 at 9:33 AM Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> wrote: > > From: Geert Uytterhoeven, Sent: Tuesday, April 4, 2023 4:21 PM > > On Wed, Jan 25, 2023 at 1:52 AM Yoshihiro Shimoda > > <yoshihiro.shimoda.uh@renesas.com> wrote: > > > > From: Yoshihiro Shimoda, Sent: Monday, January 23, 2023 10:35 AM > > > > > > > > Add IPMMU nodes for r8a779g0. > > > > > > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > > > > > > --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi > > > > +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi > > > > > > + ipmmu_ir: iommu@eed80000 { > > > > + compatible = "renesas,ipmmu-r8a779g0", > > > > + "renesas,rcar-gen4-ipmmu-vmsa"; > > > > + reg = <0 0xeed80000 0 0x20000>; > > > > + renesas,ipmmu-main = <&ipmmu_mm 3>; > > > > + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; > > > > > > The power-domains should be R8A779G0_PD_A3IR. > > > So, I'll send v2 patch after we discussed updating dt-bindings of "renesas,ipmmu-main". > > > > The binding update is commit b67ab6fb63bbbe6d ("dt-bindings: iommu: > > renesas, ipmmu-vmsa: Update for R-Car Gen4") in iommu/next. > > > > Do you still plan to send a v2, or shall I fix this (+ removal of > > renesas,ipmmu-main indices) while applying? > > I said I will send a v2, but I'm happy if you will fix this while applying. Thanks, queuing all remaining iommu patches in renesas-devel for v6.4... Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi index 83d1666a2ea1..631192dec514 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi @@ -1162,6 +1162,115 @@ dmac1: dma-controller@e7351000 { dma-channels = <16>; }; + ipmmu_rt0: iommu@ee480000 { + compatible = "renesas,ipmmu-r8a779g0", + "renesas,rcar-gen4-ipmmu-vmsa"; + reg = <0 0xee480000 0 0x20000>; + renesas,ipmmu-main = <&ipmmu_mm 4>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_rt1: iommu@ee4c0000 { + compatible = "renesas,ipmmu-r8a779g0", + "renesas,rcar-gen4-ipmmu-vmsa"; + reg = <0 0xee4c0000 0 0x20000>; + renesas,ipmmu-main = <&ipmmu_mm 5>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_ds0: iommu@eed00000 { + compatible = "renesas,ipmmu-r8a779g0", + "renesas,rcar-gen4-ipmmu-vmsa"; + reg = <0 0xeed00000 0 0x20000>; + renesas,ipmmu-main = <&ipmmu_mm 6>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_hsc: iommu@eed40000 { + compatible = "renesas,ipmmu-r8a779g0", + "renesas,rcar-gen4-ipmmu-vmsa"; + reg = <0 0xeed40000 0 0x20000>; + renesas,ipmmu-main = <&ipmmu_mm 7>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_ir: iommu@eed80000 { + compatible = "renesas,ipmmu-r8a779g0", + "renesas,rcar-gen4-ipmmu-vmsa"; + reg = <0 0xeed80000 0 0x20000>; + renesas,ipmmu-main = <&ipmmu_mm 3>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_vc0: iommu@eedc0000 { + compatible = "renesas,ipmmu-r8a779g0", + "renesas,rcar-gen4-ipmmu-vmsa"; + reg = <0 0xeedc0000 0 0x20000>; + renesas,ipmmu-main = <&ipmmu_mm 2>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_3dg: iommu@eee00000 { + compatible = "renesas,ipmmu-r8a779g0", + "renesas,rcar-gen4-ipmmu-vmsa"; + reg = <0 0xeee00000 0 0x20000>; + renesas,ipmmu-main = <&ipmmu_mm 10>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_vi0: iommu@eee80000 { + compatible = "renesas,ipmmu-r8a779g0", + "renesas,rcar-gen4-ipmmu-vmsa"; + reg = <0 0xeee80000 0 0x20000>; + renesas,ipmmu-main = <&ipmmu_mm 0>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_vi1: iommu@eeec0000 { + compatible = "renesas,ipmmu-r8a779g0", + "renesas,rcar-gen4-ipmmu-vmsa"; + reg = <0 0xeeec0000 0 0x20000>; + renesas,ipmmu-main = <&ipmmu_mm 1>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_vip0: iommu@eef00000 { + compatible = "renesas,ipmmu-r8a779g0", + "renesas,rcar-gen4-ipmmu-vmsa"; + reg = <0 0xeef00000 0 0x20000>; + renesas,ipmmu-main = <&ipmmu_mm 8>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_vip1: iommu@eef40000 { + compatible = "renesas,ipmmu-r8a779g0", + "renesas,rcar-gen4-ipmmu-vmsa"; + reg = <0 0xeef40000 0 0x20000>; + renesas,ipmmu-main = <&ipmmu_mm 8>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_mm: iommu@eefc0000 { + compatible = "renesas,ipmmu-r8a779g0", + "renesas,rcar-gen4-ipmmu-vmsa"; + reg = <0 0xeefc0000 0 0x20000>; + interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + mmc0: mmc@ee140000 { compatible = "renesas,sdhi-r8a779g0", "renesas,rcar-gen4-sdhi";
Add IPMMU nodes for r8a779g0. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 109 ++++++++++++++++++++++ 1 file changed, 109 insertions(+)