| Message ID | 20230127174040.251642-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: r9a07g043u: Add Cortex-A55 PMU node | expand |
On 27/01/2023 18:40, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Enable the performance monitor unit for the Cortex-A55 core on the > RZ/G2UL (r9a07g043u) SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi > index 9d854706ada5..33e562390646 100644 > --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi > +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi > @@ -35,6 +35,11 @@ L3_CA55: cache-controller-0 { > }; > }; > > + pmu_a55 { Same comments. Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi index 9d854706ada5..33e562390646 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi @@ -35,6 +35,11 @@ L3_CA55: cache-controller-0 { }; }; + pmu_a55 { + compatible = "arm,cortex-a55-pmu"; + interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; + }; + psci { compatible = "arm,psci-1.0", "arm,psci-0.2"; method = "smc";