| Message ID | 20230209164016.645399-1-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash | expand |
Hi Biju, On Thu, Feb 9, 2023 at 5:40 PM Biju Das <biju.das.jz@bp.renesas.com> wrote: > Enable Renesas at25ql128a flash connected to QSPI0. Also disable > the node from rzfive-smarc-som as it is untested. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi > +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi > @@ -179,6 +179,18 @@ eth1_pins: eth1 { > <RZG2L_PORT_PINMUX(18, 5, 1)>; /* IRQ7 */ > }; > > + qspi0_pins: qspi0 { > + qspi0-data { > + pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3"; > + power-source = <1800>; > + }; > + > + qspi0-ctrl { > + pins = "QSPI0_SPCLK", "QSPI0_SSL"; > + power-source = <1800>; > + }; I guess there is no need for the subnodes, as all pins use the same power-source value? > + }; > + > sdhi0_emmc_pins: sd0emmc { > sd0_emmc_data { > pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3", > @@ -230,6 +242,38 @@ sd0_mux_uhs { > }; > }; > > +&sbc { > + pinctrl-0 = <&qspi0_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <50000000>; > + spi-tx-bus-width = <1>; Why not <4>? According to the datasheet, AT25QL128A supports quad read and write. > + spi-rx-bus-width = <4>; The rest LGTM. Gr{oetje,eeting}s, Geert
Hi Geert, Thanks for the feedback. > Subject: Re: [PATCH] arm64: dts: renesas: rzg2ul-smarc-som: Enable serial > NOR flash > > Hi Biju, > > On Thu, Feb 9, 2023 at 5:40 PM Biju Das <biju.das.jz@bp.renesas.com> wrote: > > Enable Renesas at25ql128a flash connected to QSPI0. Also disable the > > node from rzfive-smarc-som as it is untested. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > Thanks for your patch! > > > --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi > > +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi > > @@ -179,6 +179,18 @@ eth1_pins: eth1 { > > <RZG2L_PORT_PINMUX(18, 5, 1)>; /* IRQ7 */ > > }; > > > > + qspi0_pins: qspi0 { > > + qspi0-data { > > + pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", > "QSPI0_IO3"; > > + power-source = <1800>; > > + }; > > + > > + qspi0-ctrl { > > + pins = "QSPI0_SPCLK", "QSPI0_SSL"; > > + power-source = <1800>; > > + }; > > I guess there is no need for the subnodes, as all pins use the same power- > source value? OK, will remove subnode. > > > + }; > > + > > sdhi0_emmc_pins: sd0emmc { > > sd0_emmc_data { > > pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", > > "SD0_DATA3", @@ -230,6 +242,38 @@ sd0_mux_uhs { > > }; > > }; > > > > +&sbc { > > + pinctrl-0 = <&qspi0_pins>; > > + pinctrl-names = "default"; > > + status = "okay"; > > + > > + flash@0 { > > + compatible = "jedec,spi-nor"; > > + reg = <0>; > > + spi-max-frequency = <50000000>; > > + spi-tx-bus-width = <1>; > > Why not <4>? According to the datasheet, AT25QL128A supports quad read and > write. With a value of <4>, currently flash write is failing. Need to debug this Issue later. root@smarc-rzg2ul:~# modprobe spi-rpc-if [ 93.604723] spi-nor spi1.0: spi-nor-generic (16384 Kbytes) [ 93.668403] 2 fixed-partitions partitions found on MTD device spi1.0 [ 93.676226] Creating 2 MTD partitions on "spi1.0": [ 93.682982] 0x000000000000-0x000000200000 : "boot" [ 93.692657] 0x000000200000-0x000001000000 : "user" root@smarc-rzg2ul:~# cd /cip-test-scripts/ root@smarc-rzg2ul:/cip-test-scripts# ./rpcif_t_001.sh EXIT|FAIL|rpcif_t_001.sh|[00:00:53] Writing to flash failed|| Cheers, Biju > > > + spi-rx-bus-width = <4>; > > The rest LGTM. > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux- > m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like > that. > -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi index 49ecd33aeeb8..d1a00f1d1b8c 100644 --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi @@ -179,6 +179,18 @@ eth1_pins: eth1 { <RZG2L_PORT_PINMUX(18, 5, 1)>; /* IRQ7 */ }; + qspi0_pins: qspi0 { + qspi0-data { + pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3"; + power-source = <1800>; + }; + + qspi0-ctrl { + pins = "QSPI0_SPCLK", "QSPI0_SSL"; + power-source = <1800>; + }; + }; + sdhi0_emmc_pins: sd0emmc { sd0_emmc_data { pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3", @@ -230,6 +242,38 @@ sd0_mux_uhs { }; }; +&sbc { + pinctrl-0 = <&qspi0_pins>; + pinctrl-names = "default"; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + + spi-cpol; + spi-cpha; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot@0 { + reg = <0x00000000 0x200000>; + read-only; + }; + user@200000 { + reg = <0x200000 0xE00000>; + }; + }; + }; +}; + #if (SW_SW0_DEV_SEL) &sdhi0 { pinctrl-0 = <&sdhi0_emmc_pins>; diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi index d6f18754eb5d..56a907180485 100644 --- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi +++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi @@ -40,6 +40,10 @@ phy1: ethernet-phy@7 { }; }; +&sbc { + status = "disabled"; +}; + &sdhi0 { status = "disabled"; };
Enable Renesas at25ql128a flash connected to QSPI0. Also disable the node from rzfive-smarc-som as it is untested. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- logs: root@smarc-rzg2ul:~# modprobe spi-rpc-if [ 105.775964] spi-nor spi1.0: spi-nor-generic (16384 Kbytes) [ 105.823268] 2 fixed-partitions partitions found on MTD device spi1.0 [ 105.829767] Creating 2 MTD partitions on "spi1.0": [ 105.835867] 0x000000000000-0x000000200000 : "boot" [ 105.849639] 0x000000200000-0x000001000000 : "user" # cat /sys/devices/platform/soc/10060000.spi/rpc-if-spi/spi_master/spi1/spi1.0/spi-nor/jedec_id 1f42181f4218 # cat /sys/devices/platform/soc/10060000.spi/rpc-if-spi/spi_master/spi1/spi1.0/spi-nor/partname spi-nor-generic Read/Write test root@smarc-rzg2ul:/cip-test-scripts# ./rpcif_t_001.sh EXIT|PASS|rpcif_t_001.sh|[00:03:25] || --- .../boot/dts/renesas/rzg2ul-smarc-som.dtsi | 44 +++++++++++++++++++ .../boot/dts/renesas/rzfive-smarc-som.dtsi | 4 ++ 2 files changed, 48 insertions(+)