diff mbox series

[v4,1/5] tty: serial: sh-sci: Add RZ/G2L SCIFA DMA tx support

Message ID 20230412145053.114847-2-biju.das.jz@bp.renesas.com (mailing list archive)
State Accepted
Delegated to: Geert Uytterhoeven
Headers show
Series Add RZ/G2L SCIFA DMAC/ SCI TX support | expand

Commit Message

Biju Das April 12, 2023, 2:50 p.m. UTC 
SCIFA IP on RZ/G2L SoC has the same signal for both interrupt
and DMA transfer request. Setting DMARS register for DMA transfer
makes the signal to work as a DMA transfer request signal and
subsequent interrupt requests to the interrupt controller
are masked. Similarly clearing DMARS register makes signal to work as
interrupt signal and subsequent interrupt requests to the interrupt
controller are unmasked.

Add SCIFA DMA tx support for RZ/G2L alike SoCs by disabling TXI line
interrupt and setting DMARS registers by DMA api for DMA transfer request.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v3->v4:
 * Updated commit description by removing tx end interrupt.
v2->v3:
 * Dropped inline function is_rz_scif_port() and instead using
   s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE for finding RZ SCIF port.
 * Dropped SCIx_TEI_IRQ as DMAC activation not possible with TEI interrupt.
 * Updated the code flow similar to SCIFA/SCIFB DMAC tx handling.
v1->v2:
 * No change
---
 drivers/tty/serial/sh-sci.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

Comments

Geert Uytterhoeven April 21, 2023, 9:22 a.m. UTC | #1 
Hi Biju,

On Wed, Apr 12, 2023 at 4:51 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> SCIFA IP on RZ/G2L SoC has the same signal for both interrupt
> and DMA transfer request. Setting DMARS register for DMA transfer
> makes the signal to work as a DMA transfer request signal and
> subsequent interrupt requests to the interrupt controller
> are masked. Similarly clearing DMARS register makes signal to work as
> interrupt signal and subsequent interrupt requests to the interrupt
> controller are unmasked.
>
> Add SCIFA DMA tx support for RZ/G2L alike SoCs by disabling TXI line
> interrupt and setting DMARS registers by DMA api for DMA transfer request.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v3->v4:
>  * Updated commit description by removing tx end interrupt.

Thanks for the update!

> --- a/drivers/tty/serial/sh-sci.c
> +++ b/drivers/tty/serial/sh-sci.c
> @@ -588,12 +588,17 @@ static void sci_start_tx(struct uart_port *port)
>
>         if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) &&
>             dma_submit_error(s->cookie_tx)) {
> +               if (s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE)
> +                       /* Switch irq from SCIF to DMA */
> +                       disable_irq(s->irqs[SCIx_TXI_IRQ]);

Please wrap this block inside curly braces.

> +

The rest LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Biju Das April 21, 2023, 9:56 a.m. UTC | #2 
Hi Geert,

> -----Original Message-----
> From: Geert Uytterhoeven <geert@linux-m68k.org>
> Sent: Friday, April 21, 2023 10:22 AM
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>; Jiri Slaby
> <jirislaby@kernel.org>; linux-serial@vger.kernel.org; Geert Uytterhoeven
> <geert+renesas@glider.be>; Prabhakar Mahadev Lad <prabhakar.mahadev-
> lad.rj@bp.renesas.com>; linux-renesas-soc@vger.kernel.org
> Subject: Re: [PATCH v4 1/5] tty: serial: sh-sci: Add RZ/G2L SCIFA DMA tx
> support
> 
> Hi Biju,
> 
> On Wed, Apr 12, 2023 at 4:51 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > SCIFA IP on RZ/G2L SoC has the same signal for both interrupt and DMA
> > transfer request. Setting DMARS register for DMA transfer makes the
> > signal to work as a DMA transfer request signal and subsequent
> > interrupt requests to the interrupt controller are masked. Similarly
> > clearing DMARS register makes signal to work as interrupt signal and
> > subsequent interrupt requests to the interrupt controller are
> > unmasked.
> >
> > Add SCIFA DMA tx support for RZ/G2L alike SoCs by disabling TXI line
> > interrupt and setting DMARS registers by DMA api for DMA transfer request.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > v3->v4:
> >  * Updated commit description by removing tx end interrupt.
> 
> Thanks for the update!
> 
> > --- a/drivers/tty/serial/sh-sci.c
> > +++ b/drivers/tty/serial/sh-sci.c
> > @@ -588,12 +588,17 @@ static void sci_start_tx(struct uart_port *port)
> >
> >         if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) &&
> >             dma_submit_error(s->cookie_tx)) {
> > +               if (s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE)
> > +                       /* Switch irq from SCIF to DMA */
> > +                       disable_irq(s->irqs[SCIx_TXI_IRQ]);
> 
> Please wrap this block inside curly braces.

I thought, for single if statement braces not needed.
That is why I haven't added. Am I missing anything here?

Note:
This patch is already applied on tty-next. I need to send a separate patch, if braces is required.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git/commit/?h=tty-next&id=8749061be196b41a874d71c073c03171bf2741b2

Cheers,
Biju

> 
> > +
> 
> The rest LGTM, so
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like
> that.
>                                 -- Linus Torvalds
Geert Uytterhoeven April 21, 2023, 10:04 a.m. UTC | #3 
Hi Biju,

On Fri, Apr 21, 2023 at 11:56 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > -----Original Message-----
> > From: Geert Uytterhoeven <geert@linux-m68k.org>
> > Sent: Friday, April 21, 2023 10:22 AM
> > To: Biju Das <biju.das.jz@bp.renesas.com>
> > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>; Jiri Slaby
> > <jirislaby@kernel.org>; linux-serial@vger.kernel.org; Geert Uytterhoeven
> > <geert+renesas@glider.be>; Prabhakar Mahadev Lad <prabhakar.mahadev-
> > lad.rj@bp.renesas.com>; linux-renesas-soc@vger.kernel.org
> > Subject: Re: [PATCH v4 1/5] tty: serial: sh-sci: Add RZ/G2L SCIFA DMA tx
> > support
> >
> > Hi Biju,
> >
> > On Wed, Apr 12, 2023 at 4:51 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > SCIFA IP on RZ/G2L SoC has the same signal for both interrupt and DMA
> > > transfer request. Setting DMARS register for DMA transfer makes the
> > > signal to work as a DMA transfer request signal and subsequent
> > > interrupt requests to the interrupt controller are masked. Similarly
> > > clearing DMARS register makes signal to work as interrupt signal and
> > > subsequent interrupt requests to the interrupt controller are
> > > unmasked.
> > >
> > > Add SCIFA DMA tx support for RZ/G2L alike SoCs by disabling TXI line
> > > interrupt and setting DMARS registers by DMA api for DMA transfer request.
> > >
> > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > ---
> > > v3->v4:
> > >  * Updated commit description by removing tx end interrupt.
> >
> > Thanks for the update!
> >
> > > --- a/drivers/tty/serial/sh-sci.c
> > > +++ b/drivers/tty/serial/sh-sci.c
> > > @@ -588,12 +588,17 @@ static void sci_start_tx(struct uart_port *port)
> > >
> > >         if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) &&
> > >             dma_submit_error(s->cookie_tx)) {
> > > +               if (s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE)
> > > +                       /* Switch irq from SCIF to DMA */
> > > +                       disable_irq(s->irqs[SCIx_TXI_IRQ]);
> >
> > Please wrap this block inside curly braces.
>
> I thought, for single if statement braces not needed.
> That is why I haven't added. Am I missing anything here?

Technically, it's indeed a single statement.  But combined with the comment,
it spans multiple lines.

Gr{oetje,eeting}s,

                        Geert
diff mbox series

Patch

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index ca31e34afd83..f70d06a03864 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -588,12 +588,17 @@  static void sci_start_tx(struct uart_port *port)
 
 	if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) &&
 	    dma_submit_error(s->cookie_tx)) {
+		if (s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE)
+			/* Switch irq from SCIF to DMA */
+			disable_irq(s->irqs[SCIx_TXI_IRQ]);
+
 		s->cookie_tx = 0;
 		schedule_work(&s->work_tx);
 	}
 #endif
 
-	if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
+	if (!s->chan_tx || s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE ||
+	    port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
 		/* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
 		ctrl = serial_port_in(port, SCSCR);
 		serial_port_out(port, SCSCR, ctrl | SCSCR_TIE);
@@ -1192,9 +1197,15 @@  static void sci_dma_tx_complete(void *arg)
 		schedule_work(&s->work_tx);
 	} else {
 		s->cookie_tx = -EINVAL;
-		if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
+		if (port->type == PORT_SCIFA || port->type == PORT_SCIFB ||
+		    s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE) {
 			u16 ctrl = serial_port_in(port, SCSCR);
 			serial_port_out(port, SCSCR, ctrl & ~SCSCR_TIE);
+			if (s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE) {
+				/* Switch irq from DMA to SCIF */
+				dmaengine_pause(s->chan_tx_saved);
+				enable_irq(s->irqs[SCIx_TXI_IRQ]);
+			}
 		}
 	}