diff mbox series

clk: renesas: r8a7778: remove checker warnings: x | !y

Message ID 20230613025403.3338129-1-gongruiqi@huaweicloud.com (mailing list archive)
State Rejected
Delegated to: Geert Uytterhoeven
Headers show
Series clk: renesas: r8a7778: remove checker warnings: x | !y | expand

Commit Message

GONG, Ruiqi June 13, 2023, 2:54 a.m. UTC
Eliminate the following Sparse reports when building with C=1:

drivers/clk/renesas/clk-r8a7778.c:85:52: warning: dubious: x | !y
drivers/clk/renesas/clk-r8a7778.c:87:50: warning: dubious: x | !y

Signed-off-by: GONG, Ruiqi <gongruiqi@huaweicloud.com>
---
 drivers/clk/renesas/clk-r8a7778.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Comments

Geert Uytterhoeven June 13, 2023, 7:39 a.m. UTC | #1
Hi Gong,

On Tue, Jun 13, 2023 at 4:50 AM GONG, Ruiqi <gongruiqi@huaweicloud.com> wrote:
> Eliminate the following Sparse reports when building with C=1:
>
> drivers/clk/renesas/clk-r8a7778.c:85:52: warning: dubious: x | !y
> drivers/clk/renesas/clk-r8a7778.c:87:50: warning: dubious: x | !y
>
> Signed-off-by: GONG, Ruiqi <gongruiqi@huaweicloud.com>

Thanks for your patch!

Looks like sparse needs to be taught the "|" is not used in a boolean
context here?

See also
https://lore.kernel.org/r/CAMuHMdXGG2xu+nXJt6CSTfV6aM=U=hMW+DiDgP3RhOw8+O8y=A@mail.gmail.com

> --- a/drivers/clk/renesas/clk-r8a7778.c
> +++ b/drivers/clk/renesas/clk-r8a7778.c
> @@ -81,11 +81,11 @@ static void __init r8a7778_cpg_clocks_init(struct device_node *np)
>
>         BUG_ON(!(mode & BIT(19)));
>
> -       cpg_mode_rates = (!!(mode & BIT(18)) << 2) |
> -                        (!!(mode & BIT(12)) << 1) |
> -                        (!!(mode & BIT(11)));
> -       cpg_mode_divs = (!!(mode & BIT(2)) << 1) |
> -                       (!!(mode & BIT(1)));
> +       cpg_mode_rates = (mode & BIT(18) ? BIT(2) : 0) |
> +                        (mode & BIT(12) ? BIT(1) : 0) |
> +                        (mode & BIT(11) ? BIT(0) : 0);
> +       cpg_mode_divs = (mode & BIT(2) ? BIT(1) : 0) |
> +                       (mode & BIT(1) ? BIT(0) : 0);
>
>         num_clks = of_property_count_strings(np, "clock-output-names");
>         if (num_clks < 0) {

Gr{oetje,eeting}s,

                        Geert
David Laight June 14, 2023, 10:17 a.m. UTC | #2
From: GONG, Ruiqi
> Sent: 13 June 2023 03:54
> 
> Eliminate the following Sparse reports when building with C=1:
> 
> drivers/clk/renesas/clk-r8a7778.c:85:52: warning: dubious: x | !y
> drivers/clk/renesas/clk-r8a7778.c:87:50: warning: dubious: x | !y
> 
> Signed-off-by: GONG, Ruiqi <gongruiqi@huaweicloud.com>
> ---
>  drivers/clk/renesas/clk-r8a7778.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/clk/renesas/clk-r8a7778.c b/drivers/clk/renesas/clk-r8a7778.c
> index 797556259370..ad1a50f3b0cd 100644
> --- a/drivers/clk/renesas/clk-r8a7778.c
> +++ b/drivers/clk/renesas/clk-r8a7778.c
> @@ -81,11 +81,11 @@ static void __init r8a7778_cpg_clocks_init(struct device_node *np)
> 
>  	BUG_ON(!(mode & BIT(19)));
> 
> -	cpg_mode_rates = (!!(mode & BIT(18)) << 2) |
> -			 (!!(mode & BIT(12)) << 1) |
> -			 (!!(mode & BIT(11)));

Try just adding a << 0 on the last line.

Recent gcc and clang optimise the code to 'shift + and'.

	David

-
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Registration No: 1397386 (Wales)
diff mbox series

Patch

diff --git a/drivers/clk/renesas/clk-r8a7778.c b/drivers/clk/renesas/clk-r8a7778.c
index 797556259370..ad1a50f3b0cd 100644
--- a/drivers/clk/renesas/clk-r8a7778.c
+++ b/drivers/clk/renesas/clk-r8a7778.c
@@ -81,11 +81,11 @@  static void __init r8a7778_cpg_clocks_init(struct device_node *np)
 
 	BUG_ON(!(mode & BIT(19)));
 
-	cpg_mode_rates = (!!(mode & BIT(18)) << 2) |
-			 (!!(mode & BIT(12)) << 1) |
-			 (!!(mode & BIT(11)));
-	cpg_mode_divs = (!!(mode & BIT(2)) << 1) |
-			(!!(mode & BIT(1)));
+	cpg_mode_rates = (mode & BIT(18) ? BIT(2) : 0) |
+			 (mode & BIT(12) ? BIT(1) : 0) |
+			 (mode & BIT(11) ? BIT(0) : 0);
+	cpg_mode_divs = (mode & BIT(2) ? BIT(1) : 0) |
+			(mode & BIT(1) ? BIT(0) : 0);
 
 	num_clks = of_property_count_strings(np, "clock-output-names");
 	if (num_clks < 0) {