Message ID | 20230623140948.384762-4-biju.das.jz@bp.renesas.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | ba3d0e791977bf2be81bdb53694564fe636e1b8f |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | Add Renesas PMIC RAA215300 and built-in RTC support | expand |
On Fri, Jun 23, 2023 at 4:10 PM Biju Das <biju.das.jz@bp.renesas.com> wrote: > Enable PMIC RAA215300 and the built-in RTC on the RZ/{G2L,V2L} SMARC > EVK. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v6->v7: > * No change. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v6.6. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi index fbbb4f03440b..aed0a9ca7f29 100644 --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi @@ -73,6 +73,13 @@ vccq_sdhi0: regulator-vccq-sdhi0 { gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>; regulator-always-on; }; + + /* 32.768kHz crystal */ + x2: x2-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; }; &adc { @@ -148,6 +155,17 @@ &gpu { mali-supply = <®_1p1v>; }; +&i2c3 { + raa215300: pmic@12 { + compatible = "renesas,raa215300"; + reg = <0x12>, <0x6f>; + reg-names = "main", "rtc"; + + clocks = <&x2>; + clock-names = "xin"; + }; +}; + &ostm1 { status = "okay"; };
Enable PMIC RAA215300 and the built-in RTC on the RZ/{G2L,V2L} SMARC EVK. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v6->v7: * No change. v5->v6: * Replaced "clock-xtal"->"x2-clock" for x2 node. * Sorted nodes in alphabetical order. v4->v5: * No change. v3->v4: * Added clock nodes. v2->v3: * No change. RFC->V2: * Updated pmic device node based on the bindings. --- .../boot/dts/renesas/rzg2l-smarc-som.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)