From patchwork Thu Jul 27 08:18:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 13329764 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54523C41513 for ; Thu, 27 Jul 2023 08:36:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234155AbjG0IgV (ORCPT ); Thu, 27 Jul 2023 04:36:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43892 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234248AbjG0IgE (ORCPT ); Thu, 27 Jul 2023 04:36:04 -0400 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7F73C6EA7; Thu, 27 Jul 2023 01:19:27 -0700 (PDT) X-IronPort-AV: E=Sophos;i="6.01,234,1684767600"; d="scan'208";a="174688954" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 27 Jul 2023 17:19:18 +0900 Received: from localhost.localdomain (unknown [10.226.93.33]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 13CAF41CA20A; Thu, 27 Jul 2023 17:19:14 +0900 (JST) From: Biju Das To: Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Fabrizio Castro , Prabhakar Mahadev Lad Subject: [PATCH v3 5/5] arm64: dts: renesas: rzg2ul-smarc: Add support for enabling MTU3 Date: Thu, 27 Jul 2023 09:18:48 +0100 Message-Id: <20230727081848.100834-6-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230727081848.100834-1-biju.das.jz@bp.renesas.com> References: <20230727081848.100834-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add support for PMOD_MTU3 macro to enable MTU3 node on RZ/G2UL SMARC EVK. The MTU3a PWM pins on PMOD0 are muxed with SPI1. Disable SPI1, when PMOD_MTU3 macro is enabled. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- v2->v3: * No change v1->v2: * No change. --- arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts | 11 +++++++++++ .../boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi | 6 ++++++ arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi | 13 +++++++++++++ 3 files changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts index 01483b4302c2..8e0107df2d46 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts +++ b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts @@ -17,6 +17,17 @@ #define SW_SW0_DEV_SEL 1 #define SW_ET0_EN_N 1 +/* + * To enable MTU3a PWM on PMOD0, + * - Set DIP-Switch SW1-3 to On position. + * - Set PMOD_MTU3 macro to 1. + */ +#define PMOD_MTU3 0 + +#if (PMOD_MTU3 && !SW_ET0_EN_N) +#error "Cannot set as both PMOD_MTU3 and !SW_ET0_EN_N are mutually exclusive" +#endif + #include "r9a07g043u.dtsi" #include "rzg2ul-smarc-som.dtsi" #include "rzg2ul-smarc.dtsi" diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi index 58923dc83faa..355694fe4af6 100644 --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi @@ -50,6 +50,12 @@ i2c1_pins: i2c1 { input-enable; }; + mtu3_pins: mtu3 { + mtu2-pwm { + pinmux = ; /* MTIOC2A */ + }; + }; + scif0_pins: scif0 { pinmux = , /* TxD */ ; /* RxD */ diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi index 2a1331ed1a5c..8eb411aac80d 100644 --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi @@ -28,6 +28,19 @@ wm8978: codec@1a { }; }; +#if PMOD_MTU3 +&mtu3 { + pinctrl-0 = <&mtu3_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&spi1 { + status = "disabled"; +}; +#endif + #if (SW_ET0_EN_N) &ssi1 { pinctrl-0 = <&ssi1_pins>;