diff mbox series

clk: vc3: Fix 64 by 64 division

Message ID 20230801135552.386796-1-biju.das.jz@bp.renesas.com (mailing list archive)
State Superseded
Delegated to: Geert Uytterhoeven
Headers show
Series clk: vc3: Fix 64 by 64 division | expand

Commit Message

Biju Das Aug. 1, 2023, 1:55 p.m. UTC
Fix the below cocci warnings by replacing do_div()->div64_ul() and
bound the result with a max value of U16_MAX.

cocci warnings:
	drivers/clk/clk-versaclock3.c:404:2-8: WARNING: do_div() does a
	64-by-32 division, please consider using div64_ul instead.

Reported-by: Julia Lawall <julia.lawall@inria.fr>
Closes: https://lore.kernel.org/r/202307270841.yr5HxYIl-lkp@intel.com/
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/clk/clk-versaclock3.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Stephen Boyd Aug. 1, 2023, 6:58 p.m. UTC | #1
Quoting Biju Das (2023-08-01 06:55:52)
> Fix the below cocci warnings by replacing do_div()->div64_ul() and
> bound the result with a max value of U16_MAX.
> 
> cocci warnings:
>         drivers/clk/clk-versaclock3.c:404:2-8: WARNING: do_div() does a
>         64-by-32 division, please consider using div64_ul instead.
> 
> Reported-by: Julia Lawall <julia.lawall@inria.fr>
> Closes: https://lore.kernel.org/r/202307270841.yr5HxYIl-lkp@intel.com/
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---

Any Fixes tag?
Biju Das Aug. 2, 2023, 6 a.m. UTC | #2
Hi Stephen Boyd,

Thanks for the feedback.

> Subject: Re: [PATCH] clk: vc3: Fix 64 by 64 division
> 
> Quoting Biju Das (2023-08-01 06:55:52)
> > Fix the below cocci warnings by replacing do_div()->div64_ul() and
> > bound the result with a max value of U16_MAX.
> >
> > cocci warnings:
> >         drivers/clk/clk-versaclock3.c:404:2-8: WARNING: do_div() does
> a
> >         64-by-32 division, please consider using div64_ul instead.
> >
> > Reported-by: Julia Lawall <julia.lawall@inria.fr>
> > Closes:
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> 
> Any Fixes tag?

Yes, the below commit in next. 

Fixes: 6e9aff555db7 ("clk: Add support for versa3 clock driver"),

Not sure the commit ID will change, when it is applied to mainline??
That is the reason I haven't provided fixes tag.

I will provide, if it is required for patches in next.

Cheers,
Biju
diff mbox series

Patch

diff --git a/drivers/clk/clk-versaclock3.c b/drivers/clk/clk-versaclock3.c
index 4ceb7fcf7fcb..7ca413a5b1fb 100644
--- a/drivers/clk/clk-versaclock3.c
+++ b/drivers/clk/clk-versaclock3.c
@@ -401,9 +401,8 @@  static long vc3_pll_round_rate(struct clk_hw *hw, unsigned long rate,
 		/* Determine best fractional part, which is 16 bit wide */
 		div_frc = rate % *parent_rate;
 		div_frc *= BIT(16) - 1;
-		do_div(div_frc, *parent_rate);
 
-		vc3->div_frc = (u32)div_frc;
+		vc3->div_frc = min_t(u64, div64_ul(div_frc, *parent_rate), U16_MAX);
 		rate = (*parent_rate *
 			(vc3->div_int * VC3_2_POW_16 + div_frc) / VC3_2_POW_16);
 	} else {