| Message ID | 20230813164003.23665-1-aford173@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | [V2] arm64: dts: imx8mp-beacon: Configure 100MHz PCIe Ref Clk | expand |
On Sun, Aug 13, 2023 at 1:40 PM Adam Ford <aford173@gmail.com> wrote: > > There is a I2C controlled 100MHz Reference clock used by the PCIe > controller. Configure this clock's DIF1 output to be used by > the PCIe. > > Signed-off-by: Adam Ford <aford173@gmail.com> > --- > V2: Remove the pcie0_refclk clock that the new one replaces. Reviewed-by: Fabio Estevam <festevam@gmail.com>
On Sun, Aug 13, 2023 at 11:40:03AM -0500, Adam Ford wrote: > There is a I2C controlled 100MHz Reference clock used by the PCIe > controller. Configure this clock's DIF1 output to be used by > the PCIe. > > Signed-off-by: Adam Ford <aford173@gmail.com> > --- > V2: Remove the pcie0_refclk clock that the new one replaces. > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts > index acd265d8b58e..a8ccde678c33 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts > @@ -23,6 +23,12 @@ chosen { > stdout-path = &uart2; > }; > > + clk_xtal25: clk-xtal25 { clock-xtal25 for the node name? > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <25000000>; > + }; > + > connector { > compatible = "usb-c-connector"; > label = "USB-C"; > @@ -112,12 +118,6 @@ led-3 { > }; > }; > > - pcie0_refclk: clock-pcie { > - compatible = "fixed-clock"; > - #clock-cells = <0>; > - clock-frequency = <100000000>; > - }; > - > reg_audio: regulator-wm8962 { > compatible = "regulator-fixed"; > regulator-name = "3v3_aud"; > @@ -246,6 +246,13 @@ pca6416_3: gpio@20 { > interrupt-controller; > #interrupt-cells = <2>; > }; > + > + pcieclk: clk@68 { clock-generator in the bindings example seems a better node name to me. Shawn > + compatible = "renesas,9fgv0241"; > + reg = <0x68>; > + clocks = <&clk_xtal25>; > + #clock-cells = <1>; > + }; > }; > > &i2c3 { > @@ -372,8 +379,9 @@ &pcie { > }; > > &pcie_phy { > + fsl,clkreq-unsupported; > fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; > - clocks = <&pcie0_refclk>; > + clocks = <&pcieclk 1>; > clock-names = "ref"; > status = "okay"; > }; > -- > 2.39.2 >
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts index acd265d8b58e..a8ccde678c33 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts @@ -23,6 +23,12 @@ chosen { stdout-path = &uart2; }; + clk_xtal25: clk-xtal25 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + connector { compatible = "usb-c-connector"; label = "USB-C"; @@ -112,12 +118,6 @@ led-3 { }; }; - pcie0_refclk: clock-pcie { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; - reg_audio: regulator-wm8962 { compatible = "regulator-fixed"; regulator-name = "3v3_aud"; @@ -246,6 +246,13 @@ pca6416_3: gpio@20 { interrupt-controller; #interrupt-cells = <2>; }; + + pcieclk: clk@68 { + compatible = "renesas,9fgv0241"; + reg = <0x68>; + clocks = <&clk_xtal25>; + #clock-cells = <1>; + }; }; &i2c3 { @@ -372,8 +379,9 @@ &pcie { }; &pcie_phy { + fsl,clkreq-unsupported; fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; - clocks = <&pcie0_refclk>; + clocks = <&pcieclk 1>; clock-names = "ref"; status = "okay"; };
There is a I2C controlled 100MHz Reference clock used by the PCIe controller. Configure this clock's DIF1 output to be used by the PCIe. Signed-off-by: Adam Ford <aford173@gmail.com> --- V2: Remove the pcie0_refclk clock that the new one replaces.