| Message ID | 20240413141806.300989-2-niklas.soderlund+renesas@ragnatech.se (mailing list archive) |
|---|---|
| State | Under Review |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: white-hawk: Add AVB1 and AVB2 | expand |
On Sat, Apr 13, 2024 at 4:19 PM Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> wrote: > Switch from defining the PHY inside the AVB node itself and create a > dedicated MDIO node for AVB0, the only AVB describing a PHY. This is > needed as adding PHYs to AVB1 and AVB2 will require setting MDIO bus > parapets and thus requires a dedicated node. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > * Changes since v2 > - New in v2. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> As this has a hard dependency on commit 2c60c4c008d4b05b ("ravb: Add support for an optional MDIO mode") in net-next, this is postponed to v6.11. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi index 9bc542bc6169..2ee306305d83 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi @@ -815,8 +815,6 @@ avb0: ethernet@e6800000 { phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; @@ -862,8 +860,6 @@ avb1: ethernet@e6810000 { phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; @@ -909,8 +905,6 @@ avb2: ethernet@e6820000 { phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi b/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi index 8ac17370ff36..b671bfab049b 100644 --- a/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi +++ b/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi @@ -142,18 +142,23 @@ reg_3p3v: regulator-3p3v { &avb0 { pinctrl-0 = <&avb0_pins>; pinctrl-names = "default"; - phy-handle = <&phy0>; + phy-handle = <&avb0_phy>; tx-internal-delay-ps = <2000>; status = "okay"; - phy0: ethernet-phy@0 { - compatible = "ethernet-phy-id0022.1622", - "ethernet-phy-ieee802.3-c22"; - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio7>; - interrupts = <5 IRQ_TYPE_LEVEL_LOW>; - reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; + mdio { + #address-cells = <1>; + #size-cells = <0>; + + avb0_phy: ethernet-phy@0 { + compatible = "ethernet-phy-id0022.1622", + "ethernet-phy-ieee802.3-c22"; + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio7>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; + }; }; };
Switch from defining the PHY inside the AVB node itself and create a dedicated MDIO node for AVB0, the only AVB describing a PHY. This is needed as adding PHYs to AVB1 and AVB2 will require setting MDIO bus parapets and thus requires a dedicated node. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> --- * Changes since v2 - New in v2. --- arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 6 ----- .../dts/renesas/white-hawk-cpu-common.dtsi | 23 +++++++++++-------- 2 files changed, 14 insertions(+), 15 deletions(-)