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The IRQC block on the RZ/Five SoC is almost identical to the one found on the RZ/G2L SoC, with the only difference being that it has additional mask control registers for NMI/IRQ/TINT. Hence new compatible string "renesas,r9a07g043f-irqc" is added for RZ/Five SoC. Signed-off-by: Lad Prabhakar Acked-by: Krzysztof Kozlowski Reviewed-by: Geert Uytterhoeven --- v3->v4 - No change v2->v3 - Dropped items for rz/five - Collected the RB tags v1->v2 - Dropped the checks for interrupts as its already handled - Added SoC specific compat string --- .../renesas,rzg2l-irqc.yaml | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml index daef4ee06f4e..44b6ae5fc802 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml @@ -21,13 +21,16 @@ description: | properties: compatible: - items: - - enum: - - renesas,r9a07g043u-irqc # RZ/G2UL - - renesas,r9a07g044-irqc # RZ/G2{L,LC} - - renesas,r9a07g054-irqc # RZ/V2L - - renesas,r9a08g045-irqc # RZ/G3S - - const: renesas,rzg2l-irqc + oneOf: + - items: + - enum: + - renesas,r9a07g043u-irqc # RZ/G2UL + - renesas,r9a07g044-irqc # RZ/G2{L,LC} + - renesas,r9a07g054-irqc # RZ/V2L + - renesas,r9a08g045-irqc # RZ/G3S + - const: renesas,rzg2l-irqc + + - const: renesas,r9a07g043f-irqc # RZ/Five '#interrupt-cells': description: The first cell should contain a macro RZG2L_{NMI,IRQX} included in the