| Message ID | 20240619102219.138927-2-jacopo.mondi@ideasonboard.com (mailing list archive) |
|---|---|
| State | New |
| Delegated to: | Kieran Bingham |
| Headers | show |
| Series | drm: rcar-du: Add support for R8A779H0 | expand |
Hi Jacopo, Thank you for the patch. CC'ing Tomi. On Wed, Jun 19, 2024 at 12:22:15PM +0200, Jacopo Mondi wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Version 0.51 of the Renesas R-Car Gen4 TRM reports bit 16 of the > CLOCKSET1 register of the DSI transmitter module to be a reserved > field. > > Fix this by correcting the CLOCKSET1_LOCK definition to match the TRM > and remove the CLOCKSET1_LOCK_PHY definition, as the register is simply > called "lock" in the datasheet. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> > --- > drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h > index f8114d11f2d1..1bf9c4717d5a 100644 > --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h > +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h > @@ -141,8 +141,7 @@ > #define PHYSETUP_RSTZ (1 << 0) > > #define CLOCKSET1 0x101c > -#define CLOCKSET1_LOCK_PHY (1 << 17) > -#define CLOCKSET1_LOCK (1 << 16) > +#define CLOCKSET1_LOCK (1 << 17) This matches the documentation, but we should get it tested on V4H to make sure it doesn't cause a regression. Tomi, would you be able to test the patch ? > #define CLOCKSET1_CLKSEL (1 << 8) > #define CLOCKSET1_CLKINSEL_EXTAL (0 << 2) > #define CLOCKSET1_CLKINSEL_DIG (1 << 2)
On 19/06/2024 22:29, Laurent Pinchart wrote: > Hi Jacopo, > > Thank you for the patch. > > CC'ing Tomi. > > On Wed, Jun 19, 2024 at 12:22:15PM +0200, Jacopo Mondi wrote: >> From: Takeshi Kihara <takeshi.kihara.df@renesas.com> >> >> Version 0.51 of the Renesas R-Car Gen4 TRM reports bit 16 of the >> CLOCKSET1 register of the DSI transmitter module to be a reserved >> field. >> >> Fix this by correcting the CLOCKSET1_LOCK definition to match the TRM >> and remove the CLOCKSET1_LOCK_PHY definition, as the register is simply >> called "lock" in the datasheet. >> >> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> >> Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> >> --- >> drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h | 3 +-- >> 1 file changed, 1 insertion(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h >> index f8114d11f2d1..1bf9c4717d5a 100644 >> --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h >> +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h >> @@ -141,8 +141,7 @@ >> #define PHYSETUP_RSTZ (1 << 0) >> >> #define CLOCKSET1 0x101c >> -#define CLOCKSET1_LOCK_PHY (1 << 17) >> -#define CLOCKSET1_LOCK (1 << 16) >> +#define CLOCKSET1_LOCK (1 << 17) > > This matches the documentation, but we should get it tested on V4H to > make sure it doesn't cause a regression. Tomi, would you be able to test > the patch ? Works for me. Tested-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Tomi
diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h index f8114d11f2d1..1bf9c4717d5a 100644 --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h @@ -141,8 +141,7 @@ #define PHYSETUP_RSTZ (1 << 0) #define CLOCKSET1 0x101c -#define CLOCKSET1_LOCK_PHY (1 << 17) -#define CLOCKSET1_LOCK (1 << 16) +#define CLOCKSET1_LOCK (1 << 17) #define CLOCKSET1_CLKSEL (1 << 8) #define CLOCKSET1_CLKINSEL_EXTAL (0 << 2) #define CLOCKSET1_CLKINSEL_DIG (1 << 2)