| Message ID | 20240725194906.14644-12-wsa+renesas@sang-engineering.com (mailing list archive) |
|---|---|
| State | Under Review |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | PWM & TPU patches for V4M | expand |
On Thu, Jul 25, 2024 at 9:49 PM Wolfram Sang <wsa+renesas@sang-engineering.com> wrote: > Add a device node for the 16-Bit Timer Pulse Unit (TPU) on the Renesas > R-Car V4H (R8A779G0) SoC. R8A779H0 > > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> > --- > arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi > index 000ea93d65e5..e12935eafff3 100644 > --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi > @@ -1023,6 +1023,17 @@ vin00isp0: endpoint@0 { > }; > }; > > + tpu: pwm@e6e80000 { Move before spi@e6e90000... > + compatible = "renesas,tpu-r8a779h0", "renesas,tpu"; > + reg = <0 0xe6e80000 0 0x148>; > + interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 718>; > + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; > + resets = <&cpg 718>; > + #pwm-cells = <3>; > + status = "disabled"; > + }; > + > vin01: video@e6ef1000 { > compatible = "renesas,vin-r8a779h0"; > reg = <0 0xe6ef1000 0 0x1000>; However, TPU does not seem to work... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Mon, Jul 29, 2024 at 08:44:33PM +0200, Geert Uytterhoeven wrote: > On Thu, Jul 25, 2024 at 9:49 PM Wolfram Sang > <wsa+renesas@sang-engineering.com> wrote: > > Add a device node for the 16-Bit Timer Pulse Unit (TPU) on the Renesas > > R-Car V4H (R8A779G0) SoC. > > R8A779H0 And V4M. Geez, where has my proof-reading gone :( > > + tpu: pwm@e6e80000 { > > Move before spi@e6e90000... OK. Do you want me to resend right away or wait for your further testing?
Hi Wolfram, On Mon, Jul 29, 2024 at 9:01 PM Wolfram Sang <wsa+renesas@sang-engineering.com> wrote: > On Mon, Jul 29, 2024 at 08:44:33PM +0200, Geert Uytterhoeven wrote: > > On Thu, Jul 25, 2024 at 9:49 PM Wolfram Sang > > <wsa+renesas@sang-engineering.com> wrote: > > > Add a device node for the 16-Bit Timer Pulse Unit (TPU) on the Renesas > > > R-Car V4H (R8A779G0) SoC. > > > > R8A779H0 > > And V4M. Geez, where has my proof-reading gone :( > > > > + tpu: pwm@e6e80000 { > > > > Move before spi@e6e90000... > > OK. Do you want me to resend right away or wait for your further > testing? Given it doesn't work yet, I think there is no need to resend for now. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi index 000ea93d65e5..e12935eafff3 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi @@ -1023,6 +1023,17 @@ vin00isp0: endpoint@0 { }; }; + tpu: pwm@e6e80000 { + compatible = "renesas,tpu-r8a779h0", "renesas,tpu"; + reg = <0 0xe6e80000 0 0x148>; + interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 718>; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 718>; + #pwm-cells = <3>; + status = "disabled"; + }; + vin01: video@e6ef1000 { compatible = "renesas,vin-r8a779h0"; reg = <0 0xe6ef1000 0 0x1000>;
Add a device node for the 16-Bit Timer Pulse Unit (TPU) on the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> --- arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)