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([178.197.215.209]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-429ded7d5a9sm134999915e9.43.2024.08.18.10.30.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Aug 2024 10:30:21 -0700 (PDT) From: Krzysztof Kozlowski To: Serge Semin , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Charles Keepax , Richard Fitzgerald , Geert Uytterhoeven , Heiko Stuebner , Maxime Coquelin , Alexandre Torgue , Magnus Damm , patches@opensource.cirrus.com, Elaine Zhang , Gabriel Fernandez , linux-mips@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH 3/5] dt-bindings: clock: renesas,cpg-clocks: add top-level constraints Date: Sun, 18 Aug 2024 19:30:12 +0200 Message-ID: <20240818173014.122073-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240818173014.122073-1-krzysztof.kozlowski@linaro.org> References: <20240818173014.122073-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Properties with variable number of items per each device are expected to have widest constraints in top-level "properties:" block and further customized (narrowed) in "if:then:". Add missing top-level constraints for clocks and clock-output-names. Signed-off-by: Krzysztof Kozlowski Acked-by: Conor Dooley Reviewed-by: Geert Uytterhoeven --- .../devicetree/bindings/clock/renesas,cpg-clocks.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml b/Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml index 9185d101737e..a0e09b7002f0 100644 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml @@ -32,12 +32,16 @@ properties: reg: maxItems: 1 - clocks: true + clocks: + minItems: 1 + maxItems: 3 '#clock-cells': const: 1 - clock-output-names: true + clock-output-names: + minItems: 3 + maxItems: 17 renesas,mode: description: Board-specific settings of the MD_CK* bits on R-Mobile A1