diff mbox series

[v3,3/8] arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes

Message ID 20240821085644.240009-4-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)
State Superseded
Delegated to: Geert Uytterhoeven
Headers show
Series Add support for Renesas RZ/V2H(P) SoC and GP-EVK platform | expand

Commit Message

Lad, Prabhakar Aug. 21, 2024, 8:56 a.m. UTC 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add OSTM0-OSTM7 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v2->v3
- Grouped the OSTM nodes

v1->v2
- New patch
---
 arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 80 ++++++++++++++++++++++
 1 file changed, 80 insertions(+)

Comments

Geert Uytterhoeven Aug. 26, 2024, 12:14 p.m. UTC | #1 
Hi Prabhakar,

On Wed, Aug 21, 2024 at 10:56 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add OSTM0-OSTM7 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> v2->v3
> - Grouped the OSTM nodes

Thanks for the update!

> --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> @@ -121,6 +121,86 @@ sys: system-controller@10430000 {
>                         status = "disabled";
>                 };
>
> +               ostm0: timer@11800000 {
> +                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
> +                       reg = <0x0 0x11800000 0x0 0x1000>;
> +                       interrupts = <GIC_SPI 17 IRQ_TYPE_EDGE_RISING>;
> +                       clocks = <&cpg CPG_MOD 67>;
> +                       resets = <&cpg 109>;
> +                       power-domains = <&cpg>;
> +                       status = "disabled";
> +               };
> +
> +               ostm1: timer@11801000 {
> +                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
> +                       reg = <0x0 0x11801000 0x0 0x1000>;
> +                       interrupts = <GIC_SPI 18 IRQ_TYPE_EDGE_RISING>;
> +                       clocks = <&cpg CPG_MOD 68>;
> +                       resets = <&cpg 110>;
> +                       power-domains = <&cpg>;
> +                       status = "disabled";
> +               };
> +
> +               ostm4: timer@12c00000 {

Usually we sort the instances within a group by instance number, i.e.

    ostm0: timer@11800000 {
    ostm1: timer@11801000 {
    ostm2: timer@14000000 {
    ostm3: timer@14001000 {
    ostm4: timer@12c00000 {
    ostm5: timer@12c01000 {
    ostm6: timer@12c02000 {
    ostm7: timer@12c03000 {

See e.g. the scif nodes in arch/arm64/boot/dts/renesas/r8a77951.dtsi:

    scif0: serial@e6e60000 {
    scif1: serial@e6e68000 {
    scif2: serial@e6e88000 {
    scif3: serial@e6c50000 {
    scif4: serial@e6c40000 {
    scif5: serial@e6f30000 {

scif3 and scif4 have lower base addresses than scif0.

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert
Lad, Prabhakar Aug. 27, 2024, 3:36 p.m. UTC | #2 
Hi Geert,

Thank you for the review.

On Mon, Aug 26, 2024 at 1:14 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Wed, Aug 21, 2024 at 10:56 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Add OSTM0-OSTM7 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > v2->v3
> > - Grouped the OSTM nodes
>
> Thanks for the update!
>
> > --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > @@ -121,6 +121,86 @@ sys: system-controller@10430000 {
> >                         status = "disabled";
> >                 };
> >
> > +               ostm0: timer@11800000 {
> > +                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
> > +                       reg = <0x0 0x11800000 0x0 0x1000>;
> > +                       interrupts = <GIC_SPI 17 IRQ_TYPE_EDGE_RISING>;
> > +                       clocks = <&cpg CPG_MOD 67>;
> > +                       resets = <&cpg 109>;
> > +                       power-domains = <&cpg>;
> > +                       status = "disabled";
> > +               };
> > +
> > +               ostm1: timer@11801000 {
> > +                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
> > +                       reg = <0x0 0x11801000 0x0 0x1000>;
> > +                       interrupts = <GIC_SPI 18 IRQ_TYPE_EDGE_RISING>;
> > +                       clocks = <&cpg CPG_MOD 68>;
> > +                       resets = <&cpg 110>;
> > +                       power-domains = <&cpg>;
> > +                       status = "disabled";
> > +               };
> > +
> > +               ostm4: timer@12c00000 {
>
> Usually we sort the instances within a group by instance number, i.e.
>
>     ostm0: timer@11800000 {
>     ostm1: timer@11801000 {
>     ostm2: timer@14000000 {
>     ostm3: timer@14001000 {
>     ostm4: timer@12c00000 {
>     ostm5: timer@12c01000 {
>     ostm6: timer@12c02000 {
>     ostm7: timer@12c03000 {
>
> See e.g. the scif nodes in arch/arm64/boot/dts/renesas/r8a77951.dtsi:
>
>     scif0: serial@e6e60000 {
>     scif1: serial@e6e68000 {
>     scif2: serial@e6e88000 {
>     scif3: serial@e6c50000 {
>     scif4: serial@e6c40000 {
>     scif5: serial@e6f30000 {
>
> scif3 and scif4 have lower base addresses than scif0.
>
OK, I'll update the nodes based on the instance number.

Cheers,
Prabhakar
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 4f89894417f6..5e3a4017fc13 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -121,6 +121,86 @@  sys: system-controller@10430000 {
 			status = "disabled";
 		};
 
+		ostm0: timer@11800000 {
+			compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+			reg = <0x0 0x11800000 0x0 0x1000>;
+			interrupts = <GIC_SPI 17 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&cpg CPG_MOD 67>;
+			resets = <&cpg 109>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ostm1: timer@11801000 {
+			compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+			reg = <0x0 0x11801000 0x0 0x1000>;
+			interrupts = <GIC_SPI 18 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&cpg CPG_MOD 68>;
+			resets = <&cpg 110>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ostm4: timer@12c00000 {
+			compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+			reg = <0x0 0x12c00000 0x0 0x1000>;
+			interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&cpg CPG_MOD 71>;
+			resets = <&cpg 113>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ostm5: timer@12c01000 {
+			compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+			reg = <0x0 0x12c01000 0x0 0x1000>;
+			interrupts = <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&cpg CPG_MOD 72>;
+			resets = <&cpg 114>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ostm6: timer@12c02000 {
+			compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+			reg = <0x0 0x12c02000 0x0 0x1000>;
+			interrupts = <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&cpg CPG_MOD 73>;
+			resets = <&cpg 115>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ostm7: timer@12c03000 {
+			compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+			reg = <0x0 0x12c03000 0x0 0x1000>;
+			interrupts = <GIC_SPI 24 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&cpg CPG_MOD 74>;
+			resets = <&cpg 116>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ostm2: timer@14000000 {
+			compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+			reg = <0x0 0x14000000 0x0 0x1000>;
+			interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&cpg CPG_MOD 69>;
+			resets = <&cpg 111>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ostm3: timer@14001000 {
+			compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+			reg = <0x0 0x14001000 0x0 0x1000>;
+			interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&cpg CPG_MOD 70>;
+			resets = <&cpg 112>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
 		scif: serial@11c01400 {
 			compatible = "renesas,scif-r9a09g057";
 			reg = <0 0x11c01400 0 0x400>;