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Signed-off-by: Lad Prabhakar --- v2->v3 - Grouped WDT nodes v1->v2 - New patch --- arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi index 9103335ac583..fb911780c4b4 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi @@ -201,6 +201,50 @@ ostm3: timer@14001000 { status = "disabled"; }; + wdt0: watchdog@11c00400 { + compatible = "renesas,r9a09g057-wdt"; + reg = <0 0x11c00400 0 0x400>; + clocks = <&cpg CPG_MOD 75>, + <&cpg CPG_MOD 76>; + clock-names = "pclk", "oscclk"; + resets = <&cpg 117>; + power-domains = <&cpg>; + status = "disabled"; + }; + + wdt2: watchdog@13000000 { + compatible = "renesas,r9a09g057-wdt"; + reg = <0 0x13000000 0 0x400>; + clocks = <&cpg CPG_MOD 79>, + <&cpg CPG_MOD 80>; + clock-names = "pclk", "oscclk"; + resets = <&cpg 119>; + power-domains = <&cpg>; + status = "disabled"; + }; + + wdt3: watchdog@13000400 { + compatible = "renesas,r9a09g057-wdt"; + reg = <0 0x13000400 0 0x400>; + clocks = <&cpg CPG_MOD 81>, + <&cpg CPG_MOD 82>; + clock-names = "pclk", "oscclk"; + resets = <&cpg 120>; + power-domains = <&cpg>; + status = "disabled"; + }; + + wdt1: watchdog@14400000 { + compatible = "renesas,r9a09g057-wdt"; + reg = <0 0x14400000 0 0x400>; + clocks = <&cpg CPG_MOD 77>, + <&cpg CPG_MOD 78>; + clock-names = "pclk", "oscclk"; + resets = <&cpg 118>; + power-domains = <&cpg>; + status = "disabled"; + }; + i2c8: i2c@11c01000 { compatible = "renesas,riic-r9a09g057"; reg = <0 0x11c01000 0 0x400>;