| Message ID | 20240906093955.3083245-2-niklas.soderlund+renesas@ragnatech.se (mailing list archive) |
|---|---|
| State | Awaiting Upstream |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | net: phy: Fallback to C22 for PHY register read/write | expand |
On Fri, 6 Sep 2024 11:39:54 +0200 Niklas Söderlund wrote: > Expose the direct mdiobus read and write functions. These will be needed > to refactor the SIOCGMIIREG and SIOCSMIIREG IOCTLs to fallback to > indirect C45 access if needed. I'm not sure Andrew is convinced in the sub-thread on patch 2, but also I don't understand why you need patch 1 at all. The callers and callees are in the same module are you're adding non-GPL exports, or am I misreading?
On Tue, Sep 10, 2024 at 04:19:34PM -0700, Jakub Kicinski wrote: > On Fri, 6 Sep 2024 11:39:54 +0200 Niklas Söderlund wrote: > > Expose the direct mdiobus read and write functions. These will be needed > > to refactor the SIOCGMIIREG and SIOCSMIIREG IOCTLs to fallback to > > indirect C45 access if needed. > > I'm not sure Andrew is convinced in the sub-thread on patch 2, but also > I don't understand why you need patch 1 at all. The callers and callees > are in the same module are you're adding non-GPL exports, or am I > misreading? I don't think any of this is required, or even desirable, and I am of the opinion that falling back to indirect C45 accesses is a bad thing when this API can be used to access devices other than the attached PHY that is being used for that decision making.
diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c index 1f98b6a96c15..2845294053eb 100644 --- a/drivers/net/phy/phy-core.c +++ b/drivers/net/phy/phy-core.c @@ -542,8 +542,8 @@ static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad, devad | MII_MMD_CTRL_NOINCR); } -static int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45, - int devad, u32 regnum) +int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45, + int devad, u32 regnum) { if (is_c45) return __mdiobus_c45_read(bus, phy_addr, devad, regnum); @@ -552,9 +552,10 @@ static int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45, /* Read the content of the MMD's selected register */ return __mdiobus_read(bus, phy_addr, MII_MMD_DATA); } +EXPORT_SYMBOL(mmd_phy_read); -static int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45, - int devad, u32 regnum, u16 val) +int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45, + int devad, u32 regnum, u16 val) { if (is_c45) return __mdiobus_c45_write(bus, phy_addr, devad, regnum, val); @@ -563,6 +564,7 @@ static int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45, /* Write the data into MMD's selected register */ return __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val); } +EXPORT_SYMBOL(mmd_phy_write); /** * __phy_read_mmd - Convenience function for reading a register diff --git a/include/linux/phy.h b/include/linux/phy.h index a98bc91a0cde..10af3e3711fa 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -1402,6 +1402,18 @@ int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); __ret; \ }) +/* + * mmd_phy_read - Convenience function for direct mdiobus read. + */ +int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45, int devad, + u32 regnum); + +/* + * mmd_phy_write - Convenience function for direct mdiobus write. + */ +int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45, + int devad, u32 regnum, u16 val); + /* * __phy_read_mmd - Convenience function for reading a register * from an MMD on a given PHY.
Expose the direct mdiobus read and write functions. These will be needed to refactor the SIOCGMIIREG and SIOCSMIIREG IOCTLs to fallback to indirect C45 access if needed. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> --- drivers/net/phy/phy-core.c | 10 ++++++---- include/linux/phy.h | 12 ++++++++++++ 2 files changed, 18 insertions(+), 4 deletions(-)