diff mbox series

[net-next,06/11] net: ravb: Disable IP header TX checksum offloading

Message ID 20240930160845.8520-7-paul@pbarker.dev (mailing list archive)
State New
Delegated to: Geert Uytterhoeven
Headers show
Series Extend GbEth checksum offload support to VLAN/IPv6 packets | expand

Commit Message

Paul Barker Sept. 30, 2024, 4:08 p.m. UTC 
From: Paul Barker <paul.barker.ct@bp.renesas.com>

For IPv4 packets, the header checksum will always be calculated in software
in the TX path (Documentation/networking/checksum-offloads.rst says "No
offloading of the IP header checksum is performed; it is always done in
software.") so there is no advantage in asking the hardware to also
calculate this checksum.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
---
 drivers/net/ethernet/renesas/ravb.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Sergey Shtylyov Sept. 30, 2024, 7:23 p.m. UTC | #1 
On 9/30/24 19:08, Paul Barker wrote:

> From: Paul Barker <paul.barker.ct@bp.renesas.com>
> 
> For IPv4 packets, the header checksum will always be calculated in software
> in the TX path (Documentation/networking/checksum-offloads.rst says "No
> offloading of the IP header checksum is performed; it is always done in
> software.") so there is no advantage in asking the hardware to also
> calculate this checksum.
> 
> Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>

Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>

[...]

MBR, Sergey
diff mbox series

Patch

diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h
index 98496aa39f3d..a5b4f4fe77b1 100644
--- a/drivers/net/ethernet/renesas/ravb.h
+++ b/drivers/net/ethernet/renesas/ravb.h
@@ -998,7 +998,7 @@  enum CSR1_BIT {
 	CSR1_TDHD	= 0x08000000,
 };
 
-#define CSR1_CSUM_ENABLE (CSR1_TIP4 | CSR1_TTCP4 | CSR1_TUDP4)
+#define CSR1_CSUM_ENABLE (CSR1_TTCP4 | CSR1_TUDP4)
 
 enum CSR2_BIT {
 	CSR2_RIP4	= 0x00000001,