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AJvYcCULBrLamKg84dcwE2zT+kpyak0vj9wymK4Mfyqq0K7Opc7KyiXIhx/pHi6wYPV4wnHB36CiiCoWTlSH@vger.kernel.org, AJvYcCVOUuXCwkY/myKYGxdJFEBa2QNt//PreVaFYld6sBJu1Q6TqQUnzmIltJqxjhaDbF8/055FtkkzWh1LEstQsP/XOJE=@vger.kernel.org, AJvYcCX4MXI4Yg/2RIBo2OQoWBQFT9CkaAz/u4GrN6NpeJvFaTI3F/crEdQvdsI3KiFeaCMkqItOyMj9W7L0Cw==@vger.kernel.org X-Gm-Message-State: AOJu0YwguJM89eH+gTyv3fexZzmiupcD/MvkctLuL2uJcP60WG7xsTD4 iaZdXuhGgrJhG+rlNljAUWJ3ghHSHQnWVbpP/kRoWb2rl3SC5Jix X-Google-Smtp-Source: AGHT+IH7+WIcxBN1TpQTtJy6P8oj3ID4uCpRAEVwBcvXJXugvSNuZGVbMUJcytLMV0YU4x2E4q9J+g== X-Received: by 2002:adf:f803:0:b0:37d:43f1:57fc with SMTP id ffacd0b85a97d-37d86d84f81mr4052151f8f.58.1729165196951; Thu, 17 Oct 2024 04:39:56 -0700 (PDT) Received: from prasmi.Home ([2a02:c7c:e309:f400:f6f5:4306:392d:908d]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37d7fbf82b1sm7060399f8f.72.2024.10.17.04.39.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2024 04:39:56 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Linus Walleij , Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 7/7] pinctrl: renesas: pinctrl-rzg2l: Override irq_request/release_resources Date: Thu, 17 Oct 2024 12:39:42 +0100 Message-ID: <20241017113942.139712-8-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241017113942.139712-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241017113942.139712-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Override the default `irq_request_resources` and `irq_release_resources` functions with `rzg2l_gpio_irq_request_resources` and `rzg2l_gpio_irq_release_resources` in the RZ/G2L pinctrl driver. The `rzg2l_gpio_irq_request_resources()` function now ensures that the pin is requested by the pinctrl core before locking the GPIO as an IRQ. This ensures that the `pinmux-pins` file in sysfs correctly reports the pin as claimed. Additionally, the `rzg2l_gpio_direction_input()` call is moved into the `rzg2l_gpio_irq_request_resources()` callback, as it makes sense to configure the GPIO pin as an input after it has been requested. The `rzg2l_gpio_irq_release_resources()` function unlocks the GPIO as an IRQ and then frees the GPIO, ensuring proper cleanup when the IRQ is no longer needed. This guarantees that the `pinmux-pins` file in sysfs correctly reports the pin as unclaimed. Also add a `pin_requested()` check in `rzg2l_gpio_free()` to return early if the pin is already released. Signed-off-by: Lad Prabhakar --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 41 +++++++++++++++++++++---- 1 file changed, 35 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index b9a8bf43a92a..47b3e296d094 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -1772,8 +1772,12 @@ static int rzg2l_gpio_get(struct gpio_chip *chip, unsigned int offset) static void rzg2l_gpio_free(struct gpio_chip *chip, unsigned int offset) { + struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip); unsigned int virq; + if (!pin_requested(pctrl->pctl, offset)) + return; + virq = irq_find_mapping(chip->irq.domain, offset); if (virq) irq_dispose_mapping(virq); @@ -2357,6 +2361,35 @@ static int rzg2l_gpio_irq_set_wake(struct irq_data *data, unsigned int on) return 0; } +static int rzg2l_gpio_irq_request_resources(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip); + unsigned int child = irqd_to_hwirq(d); + int ret; + + if (!pin_requested(pctrl->pctl, child)) { + ret = rzg2l_gpio_request(gc, child); + if (ret) + return ret; + } + + ret = rzg2l_gpio_direction_input(gc, child); + if (ret) + return ret; + + return gpiochip_irq_reqres(d); +} + +static void rzg2l_gpio_irq_release_resources(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + unsigned int child = irqd_to_hwirq(d); + + gpiochip_irq_relres(d); + rzg2l_gpio_free(gc, child); +} + static const struct irq_chip rzg2l_gpio_irqchip = { .name = "rzg2l-gpio", .irq_disable = rzg2l_gpio_irq_disable, @@ -2368,8 +2401,9 @@ static const struct irq_chip rzg2l_gpio_irqchip = { .irq_print_chip = rzg2l_gpio_irq_print_chip, .irq_set_affinity = irq_chip_set_affinity_parent, .irq_set_wake = rzg2l_gpio_irq_set_wake, + .irq_request_resources = rzg2l_gpio_irq_request_resources, + .irq_release_resources = rzg2l_gpio_irq_release_resources, .flags = IRQCHIP_IMMUTABLE, - GPIOCHIP_IRQ_RESOURCE_HELPERS, }; static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc, @@ -2381,16 +2415,11 @@ static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc, struct rzg2l_pinctrl *pctrl = gpiochip_get_data(gc); unsigned long flags; int gpioint, irq; - int ret; gpioint = rzg2l_gpio_get_gpioint(child, pctrl); if (gpioint < 0) return gpioint; - ret = rzg2l_gpio_direction_input(gc, child); - if (ret) - return ret; - spin_lock_irqsave(&pctrl->bitmap_lock, flags); irq = bitmap_find_free_region(pctrl->tint_slot, RZG2L_TINT_MAX_INTERRUPT, get_order(1)); spin_unlock_irqrestore(&pctrl->bitmap_lock, flags);