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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbc3a47sm13027694f8f.73.2024.11.26.01.21.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 01:21:18 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, p.zabel@pengutronix.de, geert+renesas@glider.be, magnus.damm@gmail.com, gregkh@linuxfoundation.org, yoshihiro.shimoda.uh@renesas.com, christophe.jaillet@wanadoo.fr Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-usb@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v2 08/15] dt-bindings: phy: renesas,usb2-phy: Add renesas,sysc-signal Date: Tue, 26 Nov 2024 11:20:43 +0200 Message-Id: <20241126092050.1825607-9-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241126092050.1825607-1-claudiu.beznea.uj@bp.renesas.com> References: <20241126092050.1825607-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea On the Renesas RZ/G3S SoC, the USB PHY receives a signal from the system controller that need to be de-asserted/asserted when power is turned on/off. This signal, called PWRRDY, is controlled through a specific register in the system controller memory space. Add the renesas,sysc-signal DT property to describe the relation b/w the system controller and the USB PHY on the Renesas RZ/G3S. This property provides a phandle to the system controller, along with the offset within the system controller memory space that manages the signal and a bitmask that indicates the specific bits required to control the signal. Signed-off-by: Claudiu Beznea --- Changes in v2: - none; this patch is new .../bindings/phy/renesas,usb2-phy.yaml | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml index 2babd200bd98..3b8dcacc3740 100644 --- a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml @@ -85,6 +85,16 @@ properties: dr_mode: true + renesas,sysc-signal: + description: System controller phandle, specifying the register + offset and bitmask associated with a specific system controller signal + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: system controller phandle + - description: register offset associated with a signal + - description: register bitmask associated with a signal + if: properties: compatible: @@ -112,6 +122,18 @@ allOf: required: - resets + - if: + properties: + compatible: + contains: + const: renesas,usb2-phy-r9a08g045 + then: + required: + - renesas,sysc-signal + else: + properties: + renesas,sysc-signal: false + additionalProperties: false examples: