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[188.217.53.234]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d527395csm51843075e9.17.2024.12.05.00.02.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Dec 2024 00:02:45 -0800 (PST) From: tomm.merciai@gmail.com X-Google-Original-From: tommaso.merciai.xr@bp.renesas.com To: tomm.merciai@gmail.com Cc: linux-renesas-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, biju.das.jz@bp.renesas.com, Tommaso Merciai , Dmitry Baryshkov , Liu Ying , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org Subject: [PATCH v2] drm/bridge: ite-it6263: Support VESA-24 input format Date: Thu, 5 Dec 2024 09:02:10 +0100 Message-Id: <20241205080210.1285385-1-tommaso.merciai.xr@bp.renesas.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Tommaso Merciai Introduce it6263_is_input_bus_fmt_valid() and refactor the it6263_bridge_atomic_get_input_bus_fmts() function to support VESA-24 format by selecting the LVDS input format based on the LVDS data mapping and thereby support both JEIDA-24 and VESA-24 input formats. Reviewed-by: Dmitry Baryshkov Signed-off-by: Tommaso Merciai Reviewed-by: Liu Ying Reviewed-by: Biju Das --- Changes since v1: - Inline it6263_is_input_bus_fmt_valid() as suggested by LYing - Fixed it6263_is_input_bus_fmt_valid() param from u32 to int as suggested by LYing - Fixed commit msg as suggested by LYing - Fixed commit body as suggested by LYing - Collected DBaryshkov tag drivers/gpu/drm/bridge/ite-it6263.c | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/ite-it6263.c b/drivers/gpu/drm/bridge/ite-it6263.c index cbabd4e20d3e..3fc5c6795487 100644 --- a/drivers/gpu/drm/bridge/ite-it6263.c +++ b/drivers/gpu/drm/bridge/ite-it6263.c @@ -48,6 +48,7 @@ #define REG_COL_DEP GENMASK(1, 0) #define BIT8 FIELD_PREP(REG_COL_DEP, 1) #define OUT_MAP BIT(4) +#define VESA BIT(4) #define JEIDA 0 #define REG_DESSC_ENB BIT(6) #define DMODE BIT(7) @@ -428,12 +429,30 @@ static inline void it6263_lvds_reset(struct it6263 *it) fsleep(10000); } +static inline bool it6263_is_input_bus_fmt_valid(int input_fmt) +{ + switch (input_fmt) { + case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA: + case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG: + return true; + } + return false; +} + static inline void it6263_lvds_set_interface(struct it6263 *it) { + u8 fmt; + /* color depth */ regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, REG_COL_DEP, BIT8); + + if (it->lvds_data_mapping == MEDIA_BUS_FMT_RGB888_1X7X4_SPWG) + fmt = VESA; + else + fmt = JEIDA; + /* output mapping */ - regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, JEIDA); + regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, fmt); if (it->lvds_dual_link) { regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, DMODE, DISO); @@ -714,14 +733,14 @@ it6263_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge, *num_input_fmts = 0; - if (it->lvds_data_mapping != MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA) + if (!it6263_is_input_bus_fmt_valid(it->lvds_data_mapping)) return NULL; input_fmts = kmalloc(sizeof(*input_fmts), GFP_KERNEL); if (!input_fmts) return NULL; - input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA; + input_fmts[0] = it->lvds_data_mapping; *num_input_fmts = 1; return input_fmts;