From patchwork Fri Dec 6 10:23:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 13896897 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B5CA01FCFD0; Fri, 6 Dec 2024 10:23:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733480635; cv=none; b=t1bxkJx//V2NpE1984CnXqv7G2BCMmVxXAndoSNj6g2Xmi+vr9Hoh2hCBPrBAPhfwZNb2g0uLW13TdKcgKg5ZwN79dIDddczDia+nYMM3N4rkxcQ6N3ivvqH0XDGDjBli3c0FaB26FWr14hPjh63tWH+RYNrluyyYBUGDH8UAjE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733480635; c=relaxed/simple; bh=J/wEisIPqyVPM4itqowdeS6/ZrdzZr6qd9/miuWDOFQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=e3vL9qxtKrMByqSV/y9fBSc5ynw5P5EItQwIlBBVIB4Cu0KIcANZ8fGC/EyMMk2mbmQCEnBvfuPHRCRmSRnzA4HuJ/vxg1oO+Xiil49TbrVvhPohPYewMuY99h37grKcg15TUwUu1k1h68oSd1RZVAauNPC6VSF07WlLu24E8Jw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: gYo2REdPRHq/mFmLUPEVGg== X-CSE-MsgGUID: EDS13Q2XS5mEEhO4vpgaQg== X-IronPort-AV: E=Sophos;i="6.12,213,1728918000"; d="scan'208";a="227116250" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 06 Dec 2024 19:23:53 +0900 Received: from localhost.localdomain (unknown [10.226.92.67]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id D012E40065C6; Fri, 6 Dec 2024 19:23:40 +0900 (JST) From: Biju Das To: Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v2 3/4] arm64: dts: renesas: r9a09g047: Add pincontrol node Date: Fri, 6 Dec 2024 10:23:08 +0000 Message-ID: <20241206102327.8737-4-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241206102327.8737-1-biju.das.jz@bp.renesas.com> References: <20241206102327.8737-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add pincontrol node to RZ/G3E ("R9A09G047") SoC DTSI. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- v1->v2: * No change. --- arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi index 39a7cfb3095b..17bc95fb111f 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi @@ -131,6 +131,19 @@ soc: soc { #size-cells = <2>; ranges; + pinctrl: pinctrl@10410000 { + compatible = "renesas,r9a09g047-pinctrl"; + reg = <0 0x10410000 0 0x10000>; + clocks = <&cpg CPG_CORE R9A09G047_IOTOP_0_SHCLK>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 176>; + #interrupt-cells = <2>; + interrupt-controller; + power-domains = <&cpg>; + resets = <&cpg 0xa5>, <&cpg 0xa6>; + }; + cpg: clock-controller@10420000 { compatible = "renesas,r9a09g047-cpg"; reg = <0 0x10420000 0 0x10000>;