Message ID | 20241206212559.192705-5-john.madieu.xa@bp.renesas.com (mailing list archive) |
---|---|
State | New |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | soc: renesas: Add system controller support for RZ/G3E SoC | expand |
Hi John, On Fri, Dec 6, 2024 at 10:26 PM John Madieu <john.madieu.xa@bp.renesas.com> wrote: > Add system controller node to RZ/G3E (R9A09G047) SoC DTSI. > > Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi > +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi > @@ -154,6 +154,13 @@ cpg: clock-controller@10420000 { > #power-domain-cells = <0>; > }; > > + sys: system-controller@10430000 { > + compatible = "renesas,r9a09g047-sys", "syscon"; The "syscon" may be dropped again depending on the outcome of Rob's series, we'll see... > + reg = <0 0x10430000 0 0x10000>; > + clocks = <&cpg CPG_CORE R9A09G047_SYS_0_PCLK>; > + resets = <&cpg 0x30>; > + }; > + > scif0: serial@11c01400 { > compatible = "renesas,scif-r9a09g047", "renesas,scif-r9a09g057"; > reg = <0 0x11c01400 0 0x400>; Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi index 17bc95fb111f..5f65e652a413 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi @@ -154,6 +154,13 @@ cpg: clock-controller@10420000 { #power-domain-cells = <0>; }; + sys: system-controller@10430000 { + compatible = "renesas,r9a09g047-sys", "syscon"; + reg = <0 0x10430000 0 0x10000>; + clocks = <&cpg CPG_CORE R9A09G047_SYS_0_PCLK>; + resets = <&cpg 0x30>; + }; + scif0: serial@11c01400 { compatible = "renesas,scif-r9a09g047", "renesas,scif-r9a09g057"; reg = <0 0x11c01400 0 0x400>;
Add system controller node to RZ/G3E (R9A09G047) SoC DTSI. Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)