diff mbox series

[6/6] arm64: dts: renesas: r9a09g057: Add `renesas,r9a09g057-syscon-wdt-errorrst` property to WDT node

Message ID 20241218003414.490498-7-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)
State New
Delegated to: Geert Uytterhoeven
Headers show
Series Add support to retrieve the bootstatus from watchdog for RZ/V2H(P) SoC | expand

Commit Message

Lad, Prabhakar Dec. 18, 2024, 12:34 a.m. UTC 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add `renesas,r9a09g057-syscon-wdt-errorrst` property to WDT node, to
determine whether the current boot resulted from a `Power-on Reset`
or a `Watchdog Reset`.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 69de6c302b17..44ec54569ce1 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -445,6 +445,7 @@  wdt0: watchdog@11c00400 {
 			clock-names = "pclk", "oscclk";
 			resets = <&cpg 0x75>;
 			power-domains = <&cpg>;
+			renesas,r9a09g057-syscon-wdt-errorrst = <&cpg 0xb40 0>;
 			status = "disabled";
 		};
 
@@ -455,6 +456,7 @@  wdt1: watchdog@14400000 {
 			clock-names = "pclk", "oscclk";
 			resets = <&cpg 0x76>;
 			power-domains = <&cpg>;
+			renesas,r9a09g057-syscon-wdt-errorrst = <&cpg 0xb40 1>;
 			status = "disabled";
 		};
 
@@ -465,6 +467,7 @@  wdt2: watchdog@13000000 {
 			clock-names = "pclk", "oscclk";
 			resets = <&cpg 0x77>;
 			power-domains = <&cpg>;
+			renesas,r9a09g057-syscon-wdt-errorrst = <&cpg 0xb40 2>;
 			status = "disabled";
 		};
 
@@ -475,6 +478,7 @@  wdt3: watchdog@13000400 {
 			clock-names = "pclk", "oscclk";
 			resets = <&cpg 0x78>;
 			power-domains = <&cpg>;
+			renesas,r9a09g057-syscon-wdt-errorrst = <&cpg 0xb40 3>;
 			status = "disabled";
 		};