From patchwork Wed Jan 15 10:38:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 13940281 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 26C8B248BC8; Wed, 15 Jan 2025 10:39:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736937583; cv=none; b=WgexuYiRzynTNTBpTV3bs1/LtiQiwixCOCCMaJt2OnDokbY7/O6IOpr1KPpdOotHCW/xJ1RkezgUUqNyZ3F70pTVi0TEi0wDN/Z8piJK7k71QBYZm8iQvdHU6pRV6wcN+hk+334cXenj0oPtiksdSZPXtaMK2QLcNHafqLDyeB0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736937583; c=relaxed/simple; bh=ZRVf4RJUAyamQljIJ290IJ//1j0qrlxZcSb6pDjDz3g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oML47DnGKzIOEWrVIRdpzRI8F3hhKvKkzMsW43Hx1iYS5rDhobseOaNTZRfA97MZs1lvoHsg4NR8OsP71AGmTyq7SSKfGsKMJMFvoXaIK7MvjZ5pHbFGKN/N9sDKDM5tj/pI/FXQJgG6AVJnw/6JFBiAN0uWQWa45F1wf09D6PU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: 2s+jOWB/Tp2rWYODYo410g== X-CSE-MsgGUID: nnTzI8umQIa7zHtWRhkvVQ== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 15 Jan 2025 19:39:31 +0900 Received: from localhost.localdomain (unknown [10.226.93.251]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 6EBFB422FD27; Wed, 15 Jan 2025 19:39:16 +0900 (JST) From: Biju Das To: Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH 4/5] arm64: dts: renesas: r9a09g047: Add WDT1-WDT3 nodes Date: Wed, 15 Jan 2025 10:38:53 +0000 Message-ID: <20250115103858.104709-5-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250115103858.104709-1-biju.das.jz@bp.renesas.com> References: <20250115103858.104709-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add WDT1-WDT3 nodes to RZ/G3E ("R9A09G047") SoC DTSI. Signed-off-by: Biju Das --- arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi index 200e9ea89193..133aa3272d3a 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi @@ -175,6 +175,36 @@ scif0: serial@11c01400 { status = "disabled"; }; + wdt1: watchdog@14400000 { + compatible = "renesas,r9a09g047-wdt", "renesas,r9a09g057-wdt"; + reg = <0 0x14400000 0 0x400>; + clocks = <&cpg CPG_MOD 0x4d>, <&cpg CPG_MOD 0x4e>; + clock-names = "pclk", "oscclk"; + resets = <&cpg 0x76>; + power-domains = <&cpg>; + status = "disabled"; + }; + + wdt2: watchdog@13000000 { + compatible = "renesas,r9a09g047-wdt", "renesas,r9a09g057-wdt"; + reg = <0 0x13000000 0 0x400>; + clocks = <&cpg CPG_MOD 0x4f>, <&cpg CPG_MOD 0x50>; + clock-names = "pclk", "oscclk"; + resets = <&cpg 0x77>; + power-domains = <&cpg>; + status = "disabled"; + }; + + wdt3: watchdog@13000400 { + compatible = "renesas,r9a09g047-wdt", "renesas,r9a09g057-wdt"; + reg = <0 0x13000400 0 0x400>; + clocks = <&cpg CPG_MOD 0x51>, <&cpg CPG_MOD 0x52>; + clock-names = "pclk", "oscclk"; + resets = <&cpg 0x78>; + power-domains = <&cpg>; + status = "disabled"; + }; + i2c0: i2c@14400400 { compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057"; reg = <0 0x14400400 0 0x400>;