diff mbox series

[2/2] clk: renesas: r8a779h0: Add VSPX clock

Message ID 20250115175927.3714357-3-niklas.soderlund+renesas@ragnatech.se (mailing list archive)
State New
Delegated to: Geert Uytterhoeven
Headers show
Series clk: renesas: r8a779h0: Add FCPVX and VSPX clocks | expand

Commit Message

Niklas Söderlund Jan. 15, 2025, 5:59 p.m. UTC
Add the VSPX modules clock for Renesas R-Car V4M.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
 drivers/clk/renesas/r8a779h0-cpg-mssr.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Geert Uytterhoeven Jan. 17, 2025, 4:30 p.m. UTC | #1
Hi Niklas,

On Wed, Jan 15, 2025 at 6:59 PM Niklas Söderlund
<niklas.soderlund+renesas@ragnatech.se> wrote:
> Add the VSPX modules clock for Renesas R-Car V4M.
>
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

Thanks for your patch!

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk for v6.15.

> --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
> @@ -239,6 +239,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = {
>         DEF_MOD("pfc1",         916,    R8A779H0_CLK_CP),
>         DEF_MOD("pfc2",         917,    R8A779H0_CLK_CP),
>         DEF_MOD("tsc2:tsc1",    919,    R8A779H0_CLK_CL16M),
> +       DEF_MOD("vspx0",        1028,   R8A779H0_CLK_S0D4_VIO),

Any specific reason you are not using S0D1, like on R-Car V4H?
I can update this while applying.

>         DEF_MOD("fcpvx0",       1100,   R8A779H0_CLK_S0D4_VIO),
>         DEF_MOD("ssiu",         2926,   R8A779H0_CLK_S0D6_PER),
>         DEF_MOD("ssi",          2927,   R8A779H0_CLK_S0D6_PER),

Gr{oetje,eeting}s,

                        Geert
diff mbox series

Patch

diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
index b92990f5ec44..22b0af0dbb27 100644
--- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
@@ -239,6 +239,7 @@  static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = {
 	DEF_MOD("pfc1",		916,	R8A779H0_CLK_CP),
 	DEF_MOD("pfc2",		917,	R8A779H0_CLK_CP),
 	DEF_MOD("tsc2:tsc1",	919,	R8A779H0_CLK_CL16M),
+	DEF_MOD("vspx0",	1028,	R8A779H0_CLK_S0D4_VIO),
 	DEF_MOD("fcpvx0",	1100,	R8A779H0_CLK_S0D4_VIO),
 	DEF_MOD("ssiu",		2926,	R8A779H0_CLK_S0D6_PER),
 	DEF_MOD("ssi",		2927,	R8A779H0_CLK_S0D6_PER),