Message ID | 20250305123915.341589-2-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
---|---|
State | New |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | Add USB2PHY control support for Renesas RZ/V2H(P) SoC | expand |
On Wed, Mar 05, 2025 at 12:39:13PM +0000, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Add device tree binding document for the Renesas RZ/V2H(P) USB2PHY Control > Device. It mainly controls reset and power down of the USB2.0 PHY (for > both host and function). > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > .../reset/renesas,rzv2h-usb2phy-ctrl.yaml | 56 +++++++++++++++++++ > 1 file changed, 56 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > > diff --git a/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml b/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > new file mode 100644 > index 000000000000..ed156a1d3eb3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > @@ -0,0 +1,56 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/renesas,rzv2h-usb2phy-ctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas RZ/V2H(P) USB2PHY Control > + > +maintainers: > + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > + > +description: > + The RZ/V2H(P) USB2PHY Control mainly controls reset and power down of the > + USB2.0 PHY. > + > +properties: > + compatible: > + const: renesas,r9a09g057-usb2phy-ctrl # RZ/V2H(P) > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + '#reset-cells': > + const: 0 > + > +required: > + - compatible > + - reg > + - clocks > + - resets > + - power-domains > + - '#reset-cells' > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/renesas,r9a09g057-cpg.h> > + > + usbphy-ctrl@15830000 { How come your nodename isn't "reset-controller"? Otherwise, Acked-by: Conor Dooley <conor.dooley@microchip.com> > + compatible = "renesas,r9a09g057-usb2phy-ctrl"; > + reg = <0x15830000 0x10000>; > + clocks = <&cpg CPG_MOD 0xb6>; > + resets = <&cpg 0xaf>; > + power-domains = <&cpg>; > + #reset-cells = <0>; > + }; > -- > 2.43.0 >
Hi Conor, Thank you for the review. On Wed, Mar 5, 2025 at 4:26 PM Conor Dooley <conor@kernel.org> wrote: > > On Wed, Mar 05, 2025 at 12:39:13PM +0000, Prabhakar wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > Add device tree binding document for the Renesas RZ/V2H(P) USB2PHY Control > > Device. It mainly controls reset and power down of the USB2.0 PHY (for > > both host and function). > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > --- > > .../reset/renesas,rzv2h-usb2phy-ctrl.yaml | 56 +++++++++++++++++++ > > 1 file changed, 56 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > > > > diff --git a/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml b/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > > new file mode 100644 > > index 000000000000..ed156a1d3eb3 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > > @@ -0,0 +1,56 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/reset/renesas,rzv2h-usb2phy-ctrl.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Renesas RZ/V2H(P) USB2PHY Control > > + > > +maintainers: > > + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > + > > +description: > > + The RZ/V2H(P) USB2PHY Control mainly controls reset and power down of the > > + USB2.0 PHY. > > + > > +properties: > > + compatible: > > + const: renesas,r9a09g057-usb2phy-ctrl # RZ/V2H(P) > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + maxItems: 1 > > + > > + resets: > > + maxItems: 1 > > + > > + power-domains: > > + maxItems: 1 > > + > > + '#reset-cells': > > + const: 0 > > + > > +required: > > + - compatible > > + - reg > > + - clocks > > + - resets > > + - power-domains > > + - '#reset-cells' > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/renesas,r9a09g057-cpg.h> > > + > > + usbphy-ctrl@15830000 { > > How come your nodename isn't "reset-controller"? This is to keep consistency with the other similar IP blocks found on Renesas SoCs [0]. [0] https://elixir.bootlin.com/linux/v6.14-rc5/source/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml#L66 > Otherwise, > Acked-by: Conor Dooley <conor.dooley@microchip.com> > > > + compatible = "renesas,r9a09g057-usb2phy-ctrl"; > > + reg = <0x15830000 0x10000>; > > + clocks = <&cpg CPG_MOD 0xb6>; > > + resets = <&cpg 0xaf>; > > + power-domains = <&cpg>; > > + #reset-cells = <0>; > > + }; > > -- > > 2.43.0 > > Cheers, Prabhakar
> From: Prabhakar <prabhakar.csengg@gmail.com> > Sent: 05 March 2025 12:39 > Subject: [PATCH v2 1/2] dt-bindings: reset: Document RZ/V2H(P) USB2PHY Control > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Add device tree binding document for the Renesas RZ/V2H(P) USB2PHY Control > Device. It mainly controls reset and power down of the USB2.0 PHY (for > both host and function). > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> > --- > .../reset/renesas,rzv2h-usb2phy-ctrl.yaml | 56 +++++++++++++++++++ > 1 file changed, 56 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > > diff --git a/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > b/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > new file mode 100644 > index 000000000000..ed156a1d3eb3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > @@ -0,0 +1,56 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/renesas,rzv2h-usb2phy-ctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas RZ/V2H(P) USB2PHY Control > + > +maintainers: > + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > + > +description: > + The RZ/V2H(P) USB2PHY Control mainly controls reset and power down of the > + USB2.0 PHY. > + > +properties: > + compatible: > + const: renesas,r9a09g057-usb2phy-ctrl # RZ/V2H(P) > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + '#reset-cells': > + const: 0 > + > +required: > + - compatible > + - reg > + - clocks > + - resets > + - power-domains > + - '#reset-cells' > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/renesas,r9a09g057-cpg.h> > + > + usbphy-ctrl@15830000 { > + compatible = "renesas,r9a09g057-usb2phy-ctrl"; > + reg = <0x15830000 0x10000>; > + clocks = <&cpg CPG_MOD 0xb6>; > + resets = <&cpg 0xaf>; > + power-domains = <&cpg>; > + #reset-cells = <0>; > + }; > -- > 2.43.0
On Wed, Mar 05, 2025 at 09:35:13PM +0000, Lad, Prabhakar wrote: > Hi Conor, > > Thank you for the review. > > On Wed, Mar 5, 2025 at 4:26 PM Conor Dooley <conor@kernel.org> wrote: > > > > On Wed, Mar 05, 2025 at 12:39:13PM +0000, Prabhakar wrote: > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > > > Add device tree binding document for the Renesas RZ/V2H(P) USB2PHY Control > > > Device. It mainly controls reset and power down of the USB2.0 PHY (for > > > both host and function). > > > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > --- > > > .../reset/renesas,rzv2h-usb2phy-ctrl.yaml | 56 +++++++++++++++++++ > > > 1 file changed, 56 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > > > > > > diff --git a/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml b/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > > > new file mode 100644 > > > index 000000000000..ed156a1d3eb3 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml > > > @@ -0,0 +1,56 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/reset/renesas,rzv2h-usb2phy-ctrl.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Renesas RZ/V2H(P) USB2PHY Control > > > + > > > +maintainers: > > > + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > + > > > +description: > > > + The RZ/V2H(P) USB2PHY Control mainly controls reset and power down of the > > > + USB2.0 PHY. > > > + > > > +properties: > > > + compatible: > > > + const: renesas,r9a09g057-usb2phy-ctrl # RZ/V2H(P) > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > + clocks: > > > + maxItems: 1 > > > + > > > + resets: > > > + maxItems: 1 > > > + > > > + power-domains: > > > + maxItems: 1 > > > + > > > + '#reset-cells': > > > + const: 0 > > > + > > > +required: > > > + - compatible > > > + - reg > > > + - clocks > > > + - resets > > > + - power-domains > > > + - '#reset-cells' > > > + > > > +additionalProperties: false > > > + > > > +examples: > > > + - | > > > + #include <dt-bindings/clock/renesas,r9a09g057-cpg.h> > > > + > > > + usbphy-ctrl@15830000 { > > > > How come your nodename isn't "reset-controller"? > This is to keep consistency with the other similar IP blocks found on > Renesas SoCs [0]. That sounds awfully like "it was wrong before, and I want to keep using the wrong node name"... If you're claiming to be some other class of device, "ctrl" should really be "controller" like all the other sorts of controllers ;) > > [0] https://elixir.bootlin.com/linux/v6.14-rc5/source/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml#L66 > > > Otherwise, > > Acked-by: Conor Dooley <conor.dooley@microchip.com> > > > > > + compatible = "renesas,r9a09g057-usb2phy-ctrl"; > > > + reg = <0x15830000 0x10000>; > > > + clocks = <&cpg CPG_MOD 0xb6>; > > > + resets = <&cpg 0xaf>; > > > + power-domains = <&cpg>; > > > + #reset-cells = <0>; > > > + }; > > > -- > > > 2.43.0 > > > > > Cheers, > Prabhakar
diff --git a/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml b/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml new file mode 100644 index 000000000000..ed156a1d3eb3 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-ctrl.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/renesas,rzv2h-usb2phy-ctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/V2H(P) USB2PHY Control + +maintainers: + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> + +description: + The RZ/V2H(P) USB2PHY Control mainly controls reset and power down of the + USB2.0 PHY. + +properties: + compatible: + const: renesas,r9a09g057-usb2phy-ctrl # RZ/V2H(P) + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + power-domains: + maxItems: 1 + + '#reset-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - resets + - power-domains + - '#reset-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/renesas,r9a09g057-cpg.h> + + usbphy-ctrl@15830000 { + compatible = "renesas,r9a09g057-usb2phy-ctrl"; + reg = <0x15830000 0x10000>; + clocks = <&cpg CPG_MOD 0xb6>; + resets = <&cpg 0xaf>; + power-domains = <&cpg>; + #reset-cells = <0>; + };