From patchwork Thu Mar 6 15:24:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Bultel X-Patchwork-Id: 14004688 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4B95620E704; Thu, 6 Mar 2025 15:26:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741274769; cv=none; b=qg/DO4gX3WegwQ9AkZboSG157OK2P8jcU8uwH76tkk6rnwBQLnZ5PjHkz34hPmwJP20/IF+//374g3oYrt+ld+QfzqyfUQ8l9HPxX1CqgJcunsOqPkwVrhpKfLc00ySEQLZ6X/HmU4bV1SUM5RBNjbQQwXTUZDG7x2P1OKQuNqk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741274769; c=relaxed/simple; bh=HzMiFeJgIJJriKBFx98J/F5uZ7WB0BoiwEyKsYRbKHk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kSveLThjKaxnIbq5XjvrJItxHs4AaCH0OrgtB197K8H4Kxxfj4sqF6+hcAHu9TYTd3jHHoEmYWCFKnT+lGmqlsJGTDn8es1VFlMkOWjoOC9xSkVLTJgEtEskYXhdau3Wecs64J/B29QI5AVg+lqaGeDETEeEsuE6uaX6bZxOJ0k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: DA5HIo0+RVeeqvSAKA+xwA== X-CSE-MsgGUID: qTgGGZH1RTWoLYc1iv9JTA== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 07 Mar 2025 00:26:04 +0900 Received: from superbuilder.administration.lan (unknown [10.226.93.123]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 366144007213; Fri, 7 Mar 2025 00:26:00 +0900 (JST) From: Thierry Bultel To: thierry.bultel@linatsea.fr Cc: linux-renesas-soc@vger.kernel.org, geert@linux-m68k.org, paul.barker.ct@bp.renesas.com, Thierry Bultel , Geert Uytterhoeven , linux-kernel@vger.kernel.org Subject: [PATCH v4 04/13] soc: renesas: Add RZ/T2H (R9A09G077) config option Date: Thu, 6 Mar 2025 16:24:38 +0100 Message-ID: <20250306152451.2356762-5-thierry.bultel.yh@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250306152451.2356762-1-thierry.bultel.yh@bp.renesas.com> References: <20250306152451.2356762-1-thierry.bultel.yh@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a configuration option for the RZ/T2H SoC. Signed-off-by: Thierry Bultel Reviewed-by: Geert Uytterhoeven --- Changes v3->v4: - Sets ARCH_R9A09G077 to Y by default. --- drivers/soc/renesas/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index 6d2e135eed89..6522328e4d9a 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -356,6 +356,12 @@ config ARCH_R9A09G057 help This enables support for the Renesas RZ/V2H(P) SoC variants. +config ARCH_R9A09G077 + bool "ARM64 Platform support for RZ/T2H" + default y if ARCH_RENESAS + help + This enables support for the Renesas RZ/T2H SoC variants. + endif # ARM64 if RISCV