| Message ID | 20250315152708.328036-5-niklas.soderlund+renesas@ragnatech.se (mailing list archive) |
|---|---|
| State | New |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | rcar-isp: Prepare for ISP core support | expand |
Hi Niklas On Sat, Mar 15, 2025 at 04:27:05PM +0100, Niklas Söderlund wrote: > The first ISP instances on V4M have both a channel select and core instance -> has > function block, describe the core region in addition to the existing cs > region. While at it update the second ISP to match the new bindings and > add the reg-names and interrupt-names property. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> Thanks j > --- > arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 21 ++++++++++++++++----- > 1 file changed, 16 insertions(+), 5 deletions(-) > > diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi > index 8524a1e7205e..ed1eefa3515d 100644 > --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi > @@ -1968,13 +1968,20 @@ du_out_dsi0: endpoint { > isp0: isp@fed00000 { > compatible = "renesas,r8a779h0-isp", > "renesas,rcar-gen4-isp"; > - reg = <0 0xfed00000 0 0x10000>; > - interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>; > - clocks = <&cpg CPG_MOD 612>; > + reg = <0 0xfed00000 0 0x10000>, <0 0xfec00000 0 0x100000>; > + reg-names = "cs", "core"; > + interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "cs", "core"; > + clocks = <&cpg CPG_MOD 612>, <&cpg CPG_MOD 16>; > + clock-names = "cs", "core"; > power-domains = <&sysc R8A779H0_PD_A3ISP0>; > - resets = <&cpg 612>; > + resets = <&cpg 612>, <&cpg 16>; > + reset-names = "cs", "core"; > status = "disabled"; > > + renesas,vspx = <&vspx0>; > + > ports { > #address-cells = <1>; > #size-cells = <0>; > @@ -2053,10 +2060,14 @@ isp1: isp@fed20000 { > compatible = "renesas,r8a779h0-isp", > "renesas,rcar-gen4-isp"; > reg = <0 0xfed20000 0 0x10000>; > - interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>; > + reg-names = "cs"; > + interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "cs"; > clocks = <&cpg CPG_MOD 613>; > + clock-names = "cs"; > power-domains = <&sysc R8A779H0_PD_A3ISP0>; > resets = <&cpg 613>; > + reset-names = "cs"; > status = "disabled"; > > ports { > -- > 2.48.1 > >
diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi index 8524a1e7205e..ed1eefa3515d 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi @@ -1968,13 +1968,20 @@ du_out_dsi0: endpoint { isp0: isp@fed00000 { compatible = "renesas,r8a779h0-isp", "renesas,rcar-gen4-isp"; - reg = <0 0xfed00000 0 0x10000>; - interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>; - clocks = <&cpg CPG_MOD 612>; + reg = <0 0xfed00000 0 0x10000>, <0 0xfec00000 0 0x100000>; + reg-names = "cs", "core"; + interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "cs", "core"; + clocks = <&cpg CPG_MOD 612>, <&cpg CPG_MOD 16>; + clock-names = "cs", "core"; power-domains = <&sysc R8A779H0_PD_A3ISP0>; - resets = <&cpg 612>; + resets = <&cpg 612>, <&cpg 16>; + reset-names = "cs", "core"; status = "disabled"; + renesas,vspx = <&vspx0>; + ports { #address-cells = <1>; #size-cells = <0>; @@ -2053,10 +2060,14 @@ isp1: isp@fed20000 { compatible = "renesas,r8a779h0-isp", "renesas,rcar-gen4-isp"; reg = <0 0xfed20000 0 0x10000>; - interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>; + reg-names = "cs"; + interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "cs"; clocks = <&cpg CPG_MOD 613>; + clock-names = "cs"; power-domains = <&sysc R8A779H0_PD_A3ISP0>; resets = <&cpg 613>; + reset-names = "cs"; status = "disabled"; ports {
The first ISP instances on V4M have both a channel select and core function block, describe the core region in addition to the existing cs region. While at it update the second ISP to match the new bindings and add the reg-names and interrupt-names property. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> --- arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-)