From patchwork Tue Mar 25 16:09:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Bultel X-Patchwork-Id: 14029212 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 39C0E2620CF; Tue, 25 Mar 2025 16:10:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742919022; cv=none; b=FgHK8FQY0jE31cZUbKIv0+z9Pah9hLVg59ynH98pttnT5MHzgx3IlznLF+EKvFoaeQcFSXRyzPFQ7k3tYFWAu2eylEjhw4PdKmpmNOdYeg6YZg9tMqnOrbMUH/bQ5Q5w9yVgu23Hk6j8o/65Ufn5TUf6RmsXK5h3cibgy1zRYVo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742919022; c=relaxed/simple; bh=9X8+BdaE/xBvIvdhgZKU7zUgebGzdB1/9tmvmtD19F0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dMJruQF6u3vs57mvQmoRLiQ7I7RK2Rpj55joJwvg2dmHhHu53DJjRmNhD7bdR/5OGMEzBU8bav+wqeL87V4EsjDGrqOS+VWZBpndx0a4dze48F9i4CjviqUObept48NOYMtg73apI4HKJbyiZG1HPrJCx8n0ngwHyoCLdP7YRus= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: 4g+UsfcnT1mxP4lfWhQR9g== X-CSE-MsgGUID: uR6zJziwR/epM9vPh0GqQg== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 26 Mar 2025 01:10:20 +0900 Received: from superbuilder.administration.lan (unknown [10.226.93.92]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 8E2624013766; Wed, 26 Mar 2025 01:10:17 +0900 (JST) From: Thierry Bultel To: thierry.bultel@linatsea.fr Cc: linux-renesas-soc@vger.kernel.org, geert@linux-m68k.org, paul.barker.ct@bp.renesas.com, Thierry Bultel , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 12/13] arm64: dts: renesas: Add initial support for renesas RZ/T2H eval board Date: Tue, 25 Mar 2025 17:09:00 +0100 Message-ID: <20250325160904.2688858-13-thierry.bultel.yh@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250325160904.2688858-1-thierry.bultel.yh@bp.renesas.com> References: <20250325160904.2688858-1-thierry.bultel.yh@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the initial device tree for the RZ/T2H evaluation board. Signed-off-by: Thierry Bultel --- Changes v4->v5: none Changes v3->v4: none --- arch/arm64/boot/dts/renesas/Makefile | 1 + .../dts/renesas/r9a09g077m44-rzt2h-evk.dts | 35 +++++++++++++++++++ 2 files changed, 36 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index 928635f2e76b..ee1af560f5e6 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -148,6 +148,7 @@ dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb dtb-$(CONFIG_ARCH_R9A09G047) += r9a09g047e57-smarc.dtb +dtb-$(CONFIG_ARCH_R9A09G077) += r9a09g077m44-rzt2h-evk.dtb dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h44-rzv2h-evk.dtb dtb-$(CONFIG_ARCH_RCAR_GEN3) += draak-ebisu-panel-aa104xd12.dtbo diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts new file mode 100644 index 000000000000..0fe3a08ca9c3 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Device Tree Source for the RZ/T2H Development EVK board + * + * Copyright (C) 2025 Renesas Electronics Corp. + */ + +/dts-v1/; + +#include "r9a09g077m44.dtsi" + +/ { + model = "Renesas Development EVK based on r9a09g077m44"; + compatible = "renesas,rzt2h-evk", "renesas,r9a09g077m44", "renesas,r9a09g077"; + + aliases { + serial0 = &sci0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&extal_clk { + clock-frequency = <25000000>; +}; + +&loco_clk { + clock-frequency = <1000000>; +}; + +&sci0 { + status = "okay"; +};