@@ -1183,20 +1183,20 @@ rzg2l_cpg_register_core_clk(const struct cpg_core_clk *core,
/**
* struct mstp_clock - MSTP gating clock
*
+ * @priv: CPG/MSTP private data
+ * @sibling: pointer to the other coupled clock
* @hw: handle between common and hardware-specific interfaces
* @off: register offset
* @bit: ON/MON bit
* @enabled: soft state of the clock, if it is coupled with another clock
- * @priv: CPG/MSTP private data
- * @sibling: pointer to the other coupled clock
*/
struct mstp_clock {
+ struct rzg2l_cpg_priv *priv;
+ struct mstp_clock *sibling;
struct clk_hw hw;
u16 off;
u8 bit;
bool enabled;
- struct rzg2l_cpg_priv *priv;
- struct mstp_clock *sibling;
};
#define to_mod_clock(_hw) container_of(_hw, struct mstp_clock, hw)