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[5/5] ARM: dts: r8a7794 add sound support

Message ID 2179456.HznTXDfKhZ@wasted.cogentembedded.com (mailing list archive)
State Superseded
Delegated to: Simon Horman
Headers show

Commit Message

Sergei Shtylyov Feb. 8, 2016, 11:04 p.m. UTC
Define the generic R8A7794 part of  the sound device node.
This sound device  is a complex one and comprises the Audio Clock Generator
(ADG), Sampling Rate Converter Unit (SCU), Serial Sound Interface [Unit]
(SSI[U]), and Audio DMAC-Peripheral-Peripheral.
It is up  to the board file to enable the device.

This patch is based on the R8A7791 sound work by Kuninori Morimoto.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
 arch/arm/boot/dts/r8a7794.dtsi |  171 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 171 insertions(+)

Comments

Kuninori Morimoto Feb. 9, 2016, 12:08 a.m. UTC | #1
Hi Sergei

> Define the generic R8A7794 part of  the sound device node.
> This sound device  is a complex one and comprises the Audio Clock Generator
> (ADG), Sampling Rate Converter Unit (SCU), Serial Sound Interface [Unit]
> (SSI[U]), and Audio DMAC-Peripheral-Peripheral.
> It is up  to the board file to enable the device.
> 
> This patch is based on the R8A7791 sound work by Kuninori Morimoto.
> 
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
(snip)
> +		clocks = <&mstp10_clks R8A7794_CLK_SSI_ALL>,
> +			 <&mstp10_clks R8A7794_CLK_SSI9>,
> +			 <&mstp10_clks R8A7794_CLK_SSI8>,
> +			 <&mstp10_clks R8A7794_CLK_SSI7>,
> +			 <&mstp10_clks R8A7794_CLK_SSI6>,
> +			 <&mstp10_clks R8A7794_CLK_SSI5>,
> +			 <&mstp10_clks R8A7794_CLK_SSI4>,
> +			 <&mstp10_clks R8A7794_CLK_SSI3>,
> +			 <&mstp10_clks R8A7794_CLK_SSI2>,
> +			 <&mstp10_clks R8A7794_CLK_SSI1>,
> +			 <&mstp10_clks R8A7794_CLK_SSI0>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC9>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC8>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC7>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC6>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC5>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC4>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC3>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC2>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC1>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC0>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_DVC0>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_DVC1>,
> +			 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
> +			 <&m2_clk>;
> +		clock-names = "ssi-all",
> +			      "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> +			      "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
> +			      "src.9", "src.8", "src.7", "src.6", "src.5",
> +			      "src.4", "src.3", "src.2", "src.1", "src.0",
> +			      "clk_a", "clk_b", "clk_c", "clk_i";

This patch doesn't support "CTU/MIX/DVC".
Your "clocks" includes "R8A7794_CLK_SCU_CTUx_MIXx", and "R8A7794_CLK_SCU_DVCx",
but "clock-names" doesn't include "ctu.x", "dvc.x".
Sergei Shtylyov Feb. 9, 2016, 10:52 a.m. UTC | #2
On 2/9/2016 3:08 AM, Kuninori Morimoto wrote:

>> Define the generic R8A7794 part of  the sound device node.
>> This sound device  is a complex one and comprises the Audio Clock Generator
>> (ADG), Sampling Rate Converter Unit (SCU), Serial Sound Interface [Unit]
>> (SSI[U]), and Audio DMAC-Peripheral-Peripheral.
>> It is up  to the board file to enable the device.
>>
>> This patch is based on the R8A7791 sound work by Kuninori Morimoto.
>>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> (snip)
>> +		clocks = <&mstp10_clks R8A7794_CLK_SSI_ALL>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI9>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI8>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI7>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI6>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI5>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI4>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI3>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI2>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI1>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI0>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC9>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC8>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC7>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC6>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC5>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC4>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC3>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC2>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC1>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC0>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_DVC0>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_DVC1>,
>> +			 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
>> +			 <&m2_clk>;
>> +		clock-names = "ssi-all",
>> +			      "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
>> +			      "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
>> +			      "src.9", "src.8", "src.7", "src.6", "src.5",
>> +			      "src.4", "src.3", "src.2", "src.1", "src.0",
>> +			      "clk_a", "clk_b", "clk_c", "clk_i";
>
> This patch doesn't support "CTU/MIX/DVC".

    It doesn't.

> Your "clocks" includes "R8A7794_CLK_SCU_CTUx_MIXx", and "R8A7794_CLK_SCU_DVCx",
> but "clock-names" doesn't include "ctu.x", "dvc.x".

    Oops, thank you for noticing. Will fix.

MBR, Sergei
Simon Horman Feb. 9, 2016, 7:50 p.m. UTC | #3
On Tue, Feb 09, 2016 at 02:04:07AM +0300, Sergei Shtylyov wrote:
> Define the generic R8A7794 part of  the sound device node.
> This sound device  is a complex one and comprises the Audio Clock Generator
> (ADG), Sampling Rate Converter Unit (SCU), Serial Sound Interface [Unit]
> (SSI[U]), and Audio DMAC-Peripheral-Peripheral.
> It is up  to the board file to enable the device.
> 
> This patch is based on the R8A7791 sound work by Kuninori Morimoto.
> 
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> 
> ---
>  arch/arm/boot/dts/r8a7794.dtsi |  171 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 171 insertions(+)
> 
> Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
> ===================================================================
> --- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
> +++ renesas/arch/arm/boot/dts/r8a7794.dtsi
> @@ -1309,4 +1309,175 @@
>  		#iommu-cells = <1>;
>  		status = "disabled";
>  	};
> +
> +	rcar_sound: sound@ec500000 {
> +		/*
> +		 * #sound-dai-cells is required
> +		 *
> +		 * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
> +		 * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
> +		 */
> +		compatible = "renesas,rcar_sound-r8a7794",
> +			     "renesas,rcar_sound-gen2";
> +		reg =	<0 0xec500000 0 0x1000>, /* SCU */
> +			<0 0xec5a0000 0 0x100>,  /* ADG */
> +			<0 0xec540000 0 0x1000>, /* SSIU */
> +			<0 0xec541000 0 0x280>,  /* SSI */
> +			<0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
> +		reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> +
> +		clocks = <&mstp10_clks R8A7794_CLK_SSI_ALL>,
> +			 <&mstp10_clks R8A7794_CLK_SSI9>,
> +			 <&mstp10_clks R8A7794_CLK_SSI8>,
> +			 <&mstp10_clks R8A7794_CLK_SSI7>,
> +			 <&mstp10_clks R8A7794_CLK_SSI6>,
> +			 <&mstp10_clks R8A7794_CLK_SSI5>,
> +			 <&mstp10_clks R8A7794_CLK_SSI4>,
> +			 <&mstp10_clks R8A7794_CLK_SSI3>,
> +			 <&mstp10_clks R8A7794_CLK_SSI2>,
> +			 <&mstp10_clks R8A7794_CLK_SSI1>,
> +			 <&mstp10_clks R8A7794_CLK_SSI0>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC9>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC8>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC7>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC6>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC5>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC4>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC3>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC2>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC1>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC0>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_DVC0>,
> +			 <&mstp10_clks R8A7794_CLK_SCU_DVC1>,
> +			 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
> +			 <&m2_clk>;
> +		clock-names = "ssi-all",
> +			      "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> +			      "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
> +			      "src.9", "src.8", "src.7", "src.6", "src.5",
> +			      "src.4", "src.3", "src.2", "src.1", "src.0",
> +			      "clk_a", "clk_b", "clk_c", "clk_i";
> +		power-domains = <&cpg_clocks>;
> +
> +		status = "disabled";
> +		rcar_sound,src {
> +			src0: src@0 {
> +				interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&audma0 0x85>, <&audma0 0x9a>;
> +				dma-names = "rx", "tx";
> +			};
> +			src1: src@1 {
> +				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&audma0 0x87>, <&audma0 0x9c>;
> +				dma-names = "rx", "tx";
> +			};
> +			src2: src@2 {
> +				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&audma0 0x89>, <&audma0 0x9e>;
> +				dma-names = "rx", "tx";
> +			};
> +			src3: src@3 {
> +				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&audma0 0x8b>, <&audma0 0xa0>;
> +				dma-names = "rx", "tx";
> +			};
> +			src4: src@4 {
> +				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&audma0 0x8d>, <&audma0 0xb0>;
> +				dma-names = "rx", "tx";
> +			};
> +			src5: src@5 {
> +				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&audma0 0x8f>, <&audma0 0xb2>;
> +				dma-names = "rx", "tx";
> +			};
> +			src6: src@6 {
> +				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&audma0 0x91>, <&audma0 0xb4>;
> +				dma-names = "rx", "tx";
> +			};
> +			src7: src@7 {
> +				interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&audma0 0x93>, <&audma0 0xb6>;
> +				dma-names = "rx", "tx";
> +			};
> +			src8: src@8 {
> +				interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&audma0 0x95>, <&audma0 0xb8>;
> +				dma-names = "rx", "tx";
> +			};
> +			src9: src@9 {
> +				interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&audma0 0x97>, <&audma0 0xba>;
> +				dma-names = "rx", "tx";
> +			};
> +		};

My reading of the documentation is that src0, 7, 8 and 9 are not
present on the r8a7794. I am referring to Figure 38.1b or r1.02 of
the R-Car Gen2 User's Manual.

[snip]
Sergei Shtylyov Feb. 9, 2016, 8:25 p.m. UTC | #4
Hello.

On 02/09/2016 10:50 PM, Simon Horman wrote:

>> Define the generic R8A7794 part of  the sound device node.
>> This sound device  is a complex one and comprises the Audio Clock Generator
>> (ADG), Sampling Rate Converter Unit (SCU), Serial Sound Interface [Unit]
>> (SSI[U]), and Audio DMAC-Peripheral-Peripheral.
>> It is up  to the board file to enable the device.
>>
>> This patch is based on the R8A7791 sound work by Kuninori Morimoto.
>>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>>
>> ---
>>   arch/arm/boot/dts/r8a7794.dtsi |  171 +++++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 171 insertions(+)
>>
>> Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
>> ===================================================================
>> --- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
>> +++ renesas/arch/arm/boot/dts/r8a7794.dtsi
>> @@ -1309,4 +1309,175 @@
>>   		#iommu-cells = <1>;
>>   		status = "disabled";
>>   	};
>> +
>> +	rcar_sound: sound@ec500000 {
>> +		/*
>> +		 * #sound-dai-cells is required
>> +		 *
>> +		 * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
>> +		 * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
>> +		 */
>> +		compatible = "renesas,rcar_sound-r8a7794",
>> +			     "renesas,rcar_sound-gen2";
>> +		reg =	<0 0xec500000 0 0x1000>, /* SCU */
>> +			<0 0xec5a0000 0 0x100>,  /* ADG */
>> +			<0 0xec540000 0 0x1000>, /* SSIU */
>> +			<0 0xec541000 0 0x280>,  /* SSI */
>> +			<0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
>> +		reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
>> +
>> +		clocks = <&mstp10_clks R8A7794_CLK_SSI_ALL>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI9>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI8>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI7>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI6>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI5>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI4>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI3>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI2>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI1>,
>> +			 <&mstp10_clks R8A7794_CLK_SSI0>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC9>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC8>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC7>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC6>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC5>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC4>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC3>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC2>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC1>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_SRC0>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_DVC0>,
>> +			 <&mstp10_clks R8A7794_CLK_SCU_DVC1>,
>> +			 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
>> +			 <&m2_clk>;
>> +		clock-names = "ssi-all",
>> +			      "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
>> +			      "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
>> +			      "src.9", "src.8", "src.7", "src.6", "src.5",
>> +			      "src.4", "src.3", "src.2", "src.1", "src.0",
>> +			      "clk_a", "clk_b", "clk_c", "clk_i";
>> +		power-domains = <&cpg_clocks>;
>> +
>> +		status = "disabled";
>> +		rcar_sound,src {
>> +			src0: src@0 {
>> +				interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
>> +				dmas = <&audma0 0x85>, <&audma0 0x9a>;
>> +				dma-names = "rx", "tx";
>> +			};
>> +			src1: src@1 {
>> +				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
>> +				dmas = <&audma0 0x87>, <&audma0 0x9c>;
>> +				dma-names = "rx", "tx";
>> +			};
>> +			src2: src@2 {
>> +				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
>> +				dmas = <&audma0 0x89>, <&audma0 0x9e>;
>> +				dma-names = "rx", "tx";
>> +			};
>> +			src3: src@3 {
>> +				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
>> +				dmas = <&audma0 0x8b>, <&audma0 0xa0>;
>> +				dma-names = "rx", "tx";
>> +			};
>> +			src4: src@4 {
>> +				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
>> +				dmas = <&audma0 0x8d>, <&audma0 0xb0>;
>> +				dma-names = "rx", "tx";
>> +			};
>> +			src5: src@5 {
>> +				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
>> +				dmas = <&audma0 0x8f>, <&audma0 0xb2>;
>> +				dma-names = "rx", "tx";
>> +			};
>> +			src6: src@6 {
>> +				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
>> +				dmas = <&audma0 0x91>, <&audma0 0xb4>;
>> +				dma-names = "rx", "tx";
>> +			};
>> +			src7: src@7 {
>> +				interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
>> +				dmas = <&audma0 0x93>, <&audma0 0xb6>;
>> +				dma-names = "rx", "tx";
>> +			};
>> +			src8: src@8 {
>> +				interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
>> +				dmas = <&audma0 0x95>, <&audma0 0xb8>;
>> +				dma-names = "rx", "tx";
>> +			};
>> +			src9: src@9 {
>> +				interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
>> +				dmas = <&audma0 0x97>, <&audma0 0xba>;
>> +				dma-names = "rx", "tx";
>> +			};
>> +		};

> My reading of the documentation is that src0, 7, 8 and 9 are not
> present on the r8a7794. I am referring to Figure 38.1b or r1.02 of
> the R-Car Gen2 User's Manual.

    Indeed, thank you for the timely comment (I'm working on the series 
respin)! However, table 7A.12 still lists the SRC0/7/8/9 clocks for R8A7794, 
table 11.1 still lists SRC0/7/8/9 interrupts for R8A7794, and table 43.4 still 
lists SRC0/7/8/9 MID+RID for R8A7794 -- go figure...

> [snip]

MBR, Sergei
Kuninori Morimoto Feb. 10, 2016, 12:32 a.m. UTC | #5
Hi

> >> Define the generic R8A7794 part of  the sound device node.
> >> This sound device  is a complex one and comprises the Audio Clock Generator
> >> (ADG), Sampling Rate Converter Unit (SCU), Serial Sound Interface [Unit]
> >> (SSI[U]), and Audio DMAC-Peripheral-Peripheral.
> >> It is up  to the board file to enable the device.
> >>
> >> This patch is based on the R8A7791 sound work by Kuninori Morimoto.
> >>
> >> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >>
> >> ---
(snip)
> > My reading of the documentation is that src0, 7, 8 and 9 are not
> > present on the r8a7794. I am referring to Figure 38.1b or r1.02 of
> > the R-Car Gen2 User's Manual.
> 
>    Indeed, thank you for the timely comment (I'm working on the series
> respin)! However, table 7A.12 still lists the SRC0/7/8/9 clocks for
> R8A7794, table 11.1 still lists SRC0/7/8/9 interrupts for R8A7794, and
> table 43.4 still lists SRC0/7/8/9 MID+RID for R8A7794 -- go figure...

Oops, current rsnd driver is assuming that DT has all channels.
This means it doesn't check src number itself.

Can you add src0, 7, 8, 9 with "non exist" comment ?
Otherwise, we need to modify driver, but I'm not sure how this assumption is deep.

Best regards
---
Kuninori Morimoto
diff mbox

Patch

Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
+++ renesas/arch/arm/boot/dts/r8a7794.dtsi
@@ -1309,4 +1309,175 @@ 
 		#iommu-cells = <1>;
 		status = "disabled";
 	};
+
+	rcar_sound: sound@ec500000 {
+		/*
+		 * #sound-dai-cells is required
+		 *
+		 * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
+		 * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
+		 */
+		compatible = "renesas,rcar_sound-r8a7794",
+			     "renesas,rcar_sound-gen2";
+		reg =	<0 0xec500000 0 0x1000>, /* SCU */
+			<0 0xec5a0000 0 0x100>,  /* ADG */
+			<0 0xec540000 0 0x1000>, /* SSIU */
+			<0 0xec541000 0 0x280>,  /* SSI */
+			<0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
+		reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+		clocks = <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+			 <&mstp10_clks R8A7794_CLK_SSI9>,
+			 <&mstp10_clks R8A7794_CLK_SSI8>,
+			 <&mstp10_clks R8A7794_CLK_SSI7>,
+			 <&mstp10_clks R8A7794_CLK_SSI6>,
+			 <&mstp10_clks R8A7794_CLK_SSI5>,
+			 <&mstp10_clks R8A7794_CLK_SSI4>,
+			 <&mstp10_clks R8A7794_CLK_SSI3>,
+			 <&mstp10_clks R8A7794_CLK_SSI2>,
+			 <&mstp10_clks R8A7794_CLK_SSI1>,
+			 <&mstp10_clks R8A7794_CLK_SSI0>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC9>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC8>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC7>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC6>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC5>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC4>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC3>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC2>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC1>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC0>,
+			 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
+			 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
+			 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
+			 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
+			 <&mstp10_clks R8A7794_CLK_SCU_DVC0>,
+			 <&mstp10_clks R8A7794_CLK_SCU_DVC1>,
+			 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
+			 <&m2_clk>;
+		clock-names = "ssi-all",
+			      "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
+			      "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
+			      "src.9", "src.8", "src.7", "src.6", "src.5",
+			      "src.4", "src.3", "src.2", "src.1", "src.0",
+			      "clk_a", "clk_b", "clk_c", "clk_i";
+		power-domains = <&cpg_clocks>;
+
+		status = "disabled";
+		rcar_sound,src {
+			src0: src@0 {
+				interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x85>, <&audma0 0x9a>;
+				dma-names = "rx", "tx";
+			};
+			src1: src@1 {
+				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x87>, <&audma0 0x9c>;
+				dma-names = "rx", "tx";
+			};
+			src2: src@2 {
+				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x89>, <&audma0 0x9e>;
+				dma-names = "rx", "tx";
+			};
+			src3: src@3 {
+				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x8b>, <&audma0 0xa0>;
+				dma-names = "rx", "tx";
+			};
+			src4: src@4 {
+				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x8d>, <&audma0 0xb0>;
+				dma-names = "rx", "tx";
+			};
+			src5: src@5 {
+				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x8f>, <&audma0 0xb2>;
+				dma-names = "rx", "tx";
+			};
+			src6: src@6 {
+				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x91>, <&audma0 0xb4>;
+				dma-names = "rx", "tx";
+			};
+			src7: src@7 {
+				interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x93>, <&audma0 0xb6>;
+				dma-names = "rx", "tx";
+			};
+			src8: src@8 {
+				interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x95>, <&audma0 0xb8>;
+				dma-names = "rx", "tx";
+			};
+			src9: src@9 {
+				interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x97>, <&audma0 0xba>;
+				dma-names = "rx", "tx";
+			};
+		};
+
+		rcar_sound,ssi {
+			ssi0: ssi@0 {
+				interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x01>, <&audma0 0x02>,
+				       <&audma0 0x15>, <&audma0 0x16>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi1: ssi@1 {
+				interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x03>, <&audma0 0x04>,
+				       <&audma0 0x49>, <&audma0 0x4a>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi2: ssi@2 {
+				interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x05>, <&audma0 0x06>,
+				       <&audma0 0x63>, <&audma0 0x64>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi3: ssi@3 {
+				interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x07>, <&audma0 0x08>,
+				       <&audma0 0x6f>, <&audma0 0x70>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi4: ssi@4 {
+				interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x09>, <&audma0 0x0a>,
+				       <&audma0 0x71>, <&audma0 0x72>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi5: ssi@5 {
+				interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x0b>, <&audma0 0x0c>,
+				       <&audma0 0x73>, <&audma0 0x74>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi6: ssi@6 {
+				interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x0d>, <&audma0 0x0e>,
+				       <&audma0 0x75>, <&audma0 0x76>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi7: ssi@7 {
+				interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x0f>, <&audma0 0x10>,
+				       <&audma0 0x79>, <&audma0 0x7a>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi8: ssi@8 {
+				interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x11>, <&audma0 0x12>,
+				       <&audma0 0x7b>, <&audma0 0x7c>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi9: ssi@9 {
+				interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x13>, <&audma0 0x14>,
+				       <&audma0 0x7d>, <&audma0 0x7e>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+		};
+	};
 };